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Message-ID: <20250620145440.047e933b@donnerap.manchester.arm.com>
Date: Fri, 20 Jun 2025 14:54:40 +0100
From: Andre Przywara <andre.przywara@....com>
To: Chen-Yu Tsai <wens@...nel.org>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>, Jernej
Skrabec <jernej@...nel.org>, Samuel Holland <samuel@...lland.org>,
devicetree@...r.kernel.org, linux-sunxi@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/5] arm64: dts: allwinner: a523: Move mmc nodes to
correct position
On Fri, 20 Jun 2025 01:30:04 +0800
Chen-Yu Tsai <wens@...nel.org> wrote:
> From: Chen-Yu Tsai <wens@...e.org>
>
> When the mmc nodes were added to the dtsi file, they were inserted in
> the incorrect position.
>
> Move them to the correct place.
Yes, they were indeed wrongly ordered! Now "grep @ ... | sort -c" is happy.
> Signed-off-by: Chen-Yu Tsai <wens@...e.org>
Reviewed-by: Andre Przywara <andre.przywara@....com>
Cheers,
Andre
> ---
> .../arm64/boot/dts/allwinner/sun55i-a523.dtsi | 126 +++++++++---------
> 1 file changed, 63 insertions(+), 63 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> index 8b7cbc2e78f5..458d7ecedacd 100644
> --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> @@ -181,69 +181,6 @@ ccu: clock-controller@...1000 {
> #reset-cells = <1>;
> };
>
> - mmc0: mmc@...0000 {
> - compatible = "allwinner,sun55i-a523-mmc",
> - "allwinner,sun20i-d1-mmc";
> - reg = <0x04020000 0x1000>;
> - clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
> - clock-names = "ahb", "mmc";
> - resets = <&ccu RST_BUS_MMC0>;
> - reset-names = "ahb";
> - interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&mmc0_pins>;
> - status = "disabled";
> -
> - max-frequency = <150000000>;
> - cap-sd-highspeed;
> - cap-mmc-highspeed;
> - cap-sdio-irq;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - };
> -
> - mmc1: mmc@...1000 {
> - compatible = "allwinner,sun55i-a523-mmc",
> - "allwinner,sun20i-d1-mmc";
> - reg = <0x04021000 0x1000>;
> - clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
> - clock-names = "ahb", "mmc";
> - resets = <&ccu RST_BUS_MMC1>;
> - reset-names = "ahb";
> - interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&mmc1_pins>;
> - status = "disabled";
> -
> - max-frequency = <150000000>;
> - cap-sd-highspeed;
> - cap-mmc-highspeed;
> - cap-sdio-irq;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - };
> -
> - mmc2: mmc@...2000 {
> - compatible = "allwinner,sun55i-a523-mmc",
> - "allwinner,sun20i-d1-mmc";
> - reg = <0x04022000 0x1000>;
> - clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
> - clock-names = "ahb", "mmc";
> - resets = <&ccu RST_BUS_MMC2>;
> - reset-names = "ahb";
> - interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
> - pinctrl-names = "default";
> - pinctrl-0 = <&mmc2_pins>;
> - status = "disabled";
> -
> - max-frequency = <150000000>;
> - cap-sd-highspeed;
> - cap-mmc-highspeed;
> - cap-sdio-irq;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - };
> -
> wdt: watchdog@...0000 {
> compatible = "allwinner,sun55i-a523-wdt";
> reg = <0x2050000 0x20>;
> @@ -449,6 +386,69 @@ its: msi-controller@...0000 {
> };
> };
>
> + mmc0: mmc@...0000 {
> + compatible = "allwinner,sun55i-a523-mmc",
> + "allwinner,sun20i-d1-mmc";
> + reg = <0x04020000 0x1000>;
> + clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
> + clock-names = "ahb", "mmc";
> + resets = <&ccu RST_BUS_MMC0>;
> + reset-names = "ahb";
> + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc0_pins>;
> + status = "disabled";
> +
> + max-frequency = <150000000>;
> + cap-sd-highspeed;
> + cap-mmc-highspeed;
> + cap-sdio-irq;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mmc1: mmc@...1000 {
> + compatible = "allwinner,sun55i-a523-mmc",
> + "allwinner,sun20i-d1-mmc";
> + reg = <0x04021000 0x1000>;
> + clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
> + clock-names = "ahb", "mmc";
> + resets = <&ccu RST_BUS_MMC1>;
> + reset-names = "ahb";
> + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc1_pins>;
> + status = "disabled";
> +
> + max-frequency = <150000000>;
> + cap-sd-highspeed;
> + cap-mmc-highspeed;
> + cap-sdio-irq;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mmc2: mmc@...2000 {
> + compatible = "allwinner,sun55i-a523-mmc",
> + "allwinner,sun20i-d1-mmc";
> + reg = <0x04022000 0x1000>;
> + clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
> + clock-names = "ahb", "mmc";
> + resets = <&ccu RST_BUS_MMC2>;
> + reset-names = "ahb";
> + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc2_pins>;
> + status = "disabled";
> +
> + max-frequency = <150000000>;
> + cap-sd-highspeed;
> + cap-mmc-highspeed;
> + cap-sdio-irq;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> usb_otg: usb@...0000 {
> compatible = "allwinner,sun55i-a523-musb",
> "allwinner,sun8i-a33-musb";
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