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Message-ID: <b7b78f8c-b70f-424c-90b8-eeb0eda50041@collabora.com>
Date: Mon, 23 Jun 2025 14:33:24 +0200
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, Laura Nao
<laura.nao@...labora.com>, mturquette@...libre.com, sboyd@...nel.org,
robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
matthias.bgg@...il.com, p.zabel@...gutronix.de, richardcochran@...il.com
Cc: guangjie.song@...iatek.com, wenst@...omium.org,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, netdev@...r.kernel.org,
kernel@...labora.com
Subject: Re: [PATCH 30/30] clk: mediatek: mt8196: Add UFS and PEXTP0/1 reset
controllers
Il 23/06/25 14:14, Krzysztof Kozlowski ha scritto:
> On 23/06/2025 12:29, Laura Nao wrote:
>> From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
>>
>> Add definitions to register the reset controllers found in the
>> UFS and PEXTP clock controllers.
>>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
>> Signed-off-by: Laura Nao <laura.nao@...labora.com>
>> ---
>> drivers/clk/mediatek/clk-mt8196-pextp.c | 36 ++++++++++++++++++++++++
>> drivers/clk/mediatek/clk-mt8196-ufs_ao.c | 25 ++++++++++++++++
>> 2 files changed, 61 insertions(+)
>
> You just added these files. Don't add incomplete driver just to fix it
> later. Add complete driver.
>
> Patch should be squashed.
Laura, feel free to squash the patches.
Cheers,
Angelo
>
> Best regards,
> Krzysztof
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