linux-kernel - RE: [PATCH v3 1/2] dt-bindings: PCI: amd-mdb: Add reset-gpios property for PCIe RP PERST# handling

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Message-ID:
 <DM4PR12MB6158ADC754402BAD15C57818CD7BA@DM4PR12MB6158.namprd12.prod.outlook.com>
Date: Wed, 25 Jun 2025 04:15:09 +0000
From: "Musham, Sai Krishna" <sai.krishna.musham@....com>
To: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>,
	"bhelgaas@...gle.com" <bhelgaas@...gle.com>, "lpieralisi@...nel.org"
	<lpieralisi@...nel.org>, "kw@...ux.com" <kw@...ux.com>, "mani@...nel.org"
	<mani@...nel.org>, "robh@...nel.org" <robh@...nel.org>, "krzk+dt@...nel.org"
	<krzk+dt@...nel.org>, "conor+dt@...nel.org" <conor+dt@...nel.org>,
	"cassel@...nel.org" <cassel@...nel.org>
CC: "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "Simek,
 Michal" <michal.simek@....com>, "Gogada, Bharat Kumar"
	<bharat.kumar.gogada@....com>, "Havalige, Thippeswamy"
	<thippeswamy.havalige@....com>
Subject: RE: [PATCH v3 1/2] dt-bindings: PCI: amd-mdb: Add reset-gpios
 property for PCIe RP PERST# handling

[AMD Official Use Only - AMD Internal Distribution Only]

Hi Krishna Chaitanya,

> -----Original Message-----
> From: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
> Sent: Monday, June 23, 2025 1:22 PM
> To: Musham, Sai Krishna <sai.krishna.musham@....com>;
> bhelgaas@...gle.com; lpieralisi@...nel.org; kw@...ux.com; mani@...nel.org;
> robh@...nel.org; krzk+dt@...nel.org; conor+dt@...nel.org; cassel@...nel.org
> Cc: linux-pci@...r.kernel.org; devicetree@...r.kernel.org; linux-
> kernel@...r.kernel.org; Simek, Michal <michal.simek@....com>; Gogada, Bharat
> Kumar <bharat.kumar.gogada@....com>; Havalige, Thippeswamy
> <thippeswamy.havalige@....com>
> Subject: Re: [PATCH v3 1/2] dt-bindings: PCI: amd-mdb: Add reset-gpios property
> for PCIe RP PERST# handling
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> On 6/18/2025 1:39 PM, Sai Krishna Musham wrote:
> > Add support for the `reset-gpios` property in the PCIe Root Port (RP)
> > child node to handle the PERST# signal via GPIO. Update the example
> > to reflect this addition.
> >
> > Signed-off-by: Sai Krishna Musham <sai.krishna.musham@....com>
> > ---
> > Changes in v3:
> > - Move reset-gpios to PCI bridge node.
> >
> > Changes in v2:
> > - Update commit message
> > ---
> >   .../bindings/pci/amd,versal2-mdb-host.yaml    | 26 +++++++++++++++++++
> >   1 file changed, 26 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
> b/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
> > index 43dc2585c237..3ffe4512650d 100644
> > --- a/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
> > +++ b/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
> > @@ -71,6 +71,21 @@ properties:
> >         - "#address-cells"
> >         - "#interrupt-cells"
> >
> > +patternProperties:
> > +  '^pcie@[0-2],0$':
> > +    type: object
> > +    $ref: /schemas/pci/pci-pci-bridge.yaml#
> > +
> > +    properties:
> > +      reg:
> > +        maxItems: 1
> > +
> > +      reset-gpios:
> > +        description: GPIO controlled connection to PERST# signal
> > +        maxItems: 1
> > +
> This is already part of pci-bus-common.yaml in dtschema no need to
> define it again here.
>

Thanks for the review. Sure, I will remove it.

> - Krishna Chaitanya.
>
> > +    unevaluatedProperties: false
> > +
> >   required:
> >     - reg
> >     - reg-names
> > @@ -87,6 +102,7 @@ examples:
> >     - |
> >       #include <dt-bindings/interrupt-controller/arm-gic.h>
> >       #include <dt-bindings/interrupt-controller/irq.h>
> > +    #include <dt-bindings/gpio/gpio.h>
> >
> >       soc {
> >           #address-cells = <2>;
> > @@ -112,6 +128,16 @@ examples:
> >               #size-cells = <2>;
> >               #interrupt-cells = <1>;
> >               device_type = "pci";
> > +
> > +            pcie@0,0 {
> > +                device_type = "pci";
> > +                reg = <0x0 0x0 0x0 0x0 0x0>;
> > +                reset-gpios = <&tca6416_u37 7 GPIO_ACTIVE_LOW>;
> > +                #address-cells = <3>;
> > +                #size-cells = <2>;
> > +                ranges;
> > +            };
> > +
> >               pcie_intc_0: interrupt-controller {
> >                   #address-cells = <0>;
> >                   #interrupt-cells = <1>;