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Message-ID:
 <TYZPR06MB656893C53B13B2D288BCDEA1F17BA@TYZPR06MB6568.apcprd06.prod.outlook.com>
Date: Wed, 25 Jun 2025 00:34:09 +0000
From: Jammy Huang <jammy_huang@...eedtech.com>
To: Andrew Jeffery <andrew@...econstruct.com.au>, "jassisinghbrar@...il.com"
	<jassisinghbrar@...il.com>, "robh@...nel.org" <robh@...nel.org>,
	"krzk+dt@...nel.org" <krzk+dt@...nel.org>, "conor+dt@...nel.org"
	<conor+dt@...nel.org>, "joel@....id.au" <joel@....id.au>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "linux-aspeed@...ts.ozlabs.org"
	<linux-aspeed@...ts.ozlabs.org>
CC: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: RE: [PATCH v4 1/2] dt-bindings: mailbox: Add ASPEED AST2700 series
 SoC

> 
> On Mon, 2025-06-23 at 10:44 +0800, Jammy Huang wrote:
> > Introduce the mailbox module for AST27XX series SoC, which is
> > responsible for interchanging messages between asymmetric processors.
> >
> > Signed-off-by: Jammy Huang <jammy_huang@...eedtech.com>
> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> > ---
> >  .../mailbox/aspeed,ast2700-mailbox.yaml       | 57
> > +++++++++++++++++++
> >  1 file changed, 57 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/mailbox/aspeed,ast2700-mailbox.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/mailbox/aspeed,ast2700-mailbox.yam
> > l
> > b/Documentation/devicetree/bindings/mailbox/aspeed,ast2700-mailbox.yam
> > l
> > new file mode 100644
> > index 000000000000..9c5d7028e116
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mailbox/aspeed,ast2700-mailbox
> > +++ .yaml
> > @@ -0,0 +1,57 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id:
> > +http://devicetree.org/schemas/mailbox/aspeed,ast2700-mailbox.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: ASPEED AST2700 mailbox controller
> > +
> > +maintainers:
> > +  - Jammy Huang <jammy_huang@...eedtech.com>
> > +
> > +description:
> > +  ASPEED AST2700 has multiple processors that need to communicate
> > +with each
> > +  other. The mailbox controller provides a way for these processors
> > +to send
> > +  messages to each other. It is a hardware-based inter-processor
> > +communication
> > +  mechanism that allows processors to send and receive messages
> > +through
> > +  dedicated channels.
> > +  The mailbox's tx/rx are independent, meaning that one processor can
> > +send a
> > +  message while another processor is receiving a message simultaneously.
> > +  There are 4 channels available for both tx and rx operations. Each
> > +channel
> > +  has a FIFO buffer that can hold messages of a fixed size (32 bytes
> > +in this
> > +  case).
> > +  The mailbox controller also supports interrupt generation, allowing
> > +  processors to notify each other when a message is available or when
> > +an event
> > +  occurs.
> > +
> > +properties:
> > +  compatible:
> > +    const: aspeed,ast2700-mailbox
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  interrupts:
> > +    maxItems: 1
> > +
> > +  "#mbox-cells":
> > +    const: 1
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - interrupts
> > +  - "#mbox-cells"
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +    mailbox@...1c200 {
> > +        compatible = "aspeed,ast2700-mailbox";
> > +        reg = <0x12c1c200 0x200>;
> 
> I realise this is just an example, but with respect to the datasheet, shouldn't
> this be sized as 0x100?
> 
I use 0x200 here because I want to include tx/rx together in one mailbox controller
instance.
Ex. 0x12c1c200 is a IPC whose TX is NS-CA35 and RX is SSP.
0x12c1c300 is a IPC whose TX is SSP and RX is NS-CA35.

> Otherwise,
> 
> Reviewed-by: Andrew Jeffery <andrew@...econstruct.com.au>

Best Regards
Jammy

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