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Message-ID: <94e42d9b-fae3-4e3a-a72f-dc284d0b4abc@mleia.com>
Date: Wed, 25 Jun 2025 03:37:49 +0300
From: Vladimir Zapolskiy <vz@...ia.com>
To: Frank Li <Frank.Li@....com>, Uwe Kleine-König
<ukleinek@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Piotr Wojtaszczyk <piotr.wojtaszczyk@...esys.com>,
"open list:PWM SUBSYSTEM" <linux-pwm@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
"moderated list:ARM/LPC32XX SOC SUPPORT"
<linux-arm-kernel@...ts.infradead.org>,
open list <linux-kernel@...r.kernel.org>
Cc: imx@...ts.linux.dev
Subject: Re: [PATCH 1/1] dt-bindings: pwm: convert lpc32xx-pwm.txt to yaml
format
On 6/24/25 23:09, Frank Li wrote:
> Convert pc32xx-pwm.txt to yaml format.
>
> Additional changes:
> - add ref to pwm.yaml
> - restrict #pwm-cells to 3
>
> Signed-off-by: Frank Li <Frank.Li@....com>
> ---
> .../devicetree/bindings/pwm/lpc32xx-pwm.txt | 17 --------
> .../bindings/pwm/nxp,lpc3220-pwm.yaml | 41 +++++++++++++++++++
> 2 files changed, 41 insertions(+), 17 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
> create mode 100644 Documentation/devicetree/bindings/pwm/nxp,lpc3220-pwm.yaml
>
> diff --git a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt b/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
> deleted file mode 100644
> index 74b5bc5dd19ac..0000000000000
> --- a/Documentation/devicetree/bindings/pwm/lpc32xx-pwm.txt
> +++ /dev/null
> @@ -1,17 +0,0 @@
> -LPC32XX PWM controller
> -
> -Required properties:
> -- compatible: should be "nxp,lpc3220-pwm"
> -- reg: physical base address and length of the controller's registers
> -
> -Examples:
> -
> -pwm@...5c000 {
> - compatible = "nxp,lpc3220-pwm";
> - reg = <0x4005c000 0x4>;
> -};
> -
> -pwm@...5c004 {
> - compatible = "nxp,lpc3220-pwm";
> - reg = <0x4005c004 0x4>;
> -};
> diff --git a/Documentation/devicetree/bindings/pwm/nxp,lpc3220-pwm.yaml b/Documentation/devicetree/bindings/pwm/nxp,lpc3220-pwm.yaml
> new file mode 100644
> index 0000000000000..b82d52f583df8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/nxp,lpc3220-pwm.yaml
> @@ -0,0 +1,41 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pwm/nxp,lpc3220-pwm.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP LPC32XX PWM controller
> +
> +maintainers:
> + - Frank Li <Frank.Li@....com>
> +
> +properties:
> + compatible:
> + enum:
> + - nxp,lpc3220-pwm
> + - nxp,lpc3220-motor-pwm
> +
> + reg:
> + maxItems: 1
> +
> + '#pwm-cells':
> + const: 3
> +
> +required:
> + - compatible
> + - reg
> + - '#pwm-cells'
> +
> +allOf:
> + - $ref: pwm.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + pwm@...5c000 {
> + compatible = "nxp,lpc3220-pwm";
> + reg = <0x4005c000 0x4>;
> + #pwm-cells = <3>;
> + };
> +
"clocks" and "assigned-clock-parents" properties are required.
Please fix the old .txt scheme, or the new one.
I will have to NAK any converted yaml file, if there is a clear
difference between the actual and proper description of controllers
from lpc32xx.dtsi and new proposed schemes.
--
Best wishes,
Vladimir
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