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Message-ID: <d163080d-61ee-4af1-a783-5a77cbc525d1@quicinc.com>
Date: Wed, 25 Jun 2025 18:00:46 +0800
From: Baochen Qiang <quic_bqiang@...cinc.com>
To: Johan Hovold <johan+linaro@...nel.org>, Jeff Johnson <jjohnson@...nel.org>
CC: Miaoqing Pan <quic_miaoqing@...cinc.com>, <linux-wireless@...r.kernel.org>,
<ath11k@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<stable@...r.kernel.org>
Subject: Re: [PATCH v2 5/5] wifi: ath11k: fix dest ring-buffer corruption when
ring is full
On 6/4/2025 10:34 PM, Johan Hovold wrote:
> Add the missing memory barriers to make sure that destination ring
> descriptors are read before updating the tail pointer (and passing
> ownership to the device) to avoid memory corruption on weakly ordered
> architectures like aarch64 when the ring is full.
>
> Tested-on: WCN6855 hw2.1 WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3.6510.41
>
> Fixes: d5c65159f289 ("ath11k: driver for Qualcomm IEEE 802.11ax devices")
> Cc: stable@...r.kernel.org # 5.6
> Signed-off-by: Johan Hovold <johan+linaro@...nel.org>
> ---
> drivers/net/wireless/ath/ath11k/hal.c | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/wireless/ath/ath11k/hal.c b/drivers/net/wireless/ath/ath11k/hal.c
> index 927ed2bc3fbf..7eeffb36899e 100644
> --- a/drivers/net/wireless/ath/ath11k/hal.c
> +++ b/drivers/net/wireless/ath/ath11k/hal.c
> @@ -854,7 +854,6 @@ void ath11k_hal_srng_access_end(struct ath11k_base *ab, struct hal_srng *srng)
> {
> lockdep_assert_held(&srng->lock);
>
> - /* TODO: See if we need a write memory barrier here */
> if (srng->flags & HAL_SRNG_FLAGS_LMAC_RING) {
> /* For LMAC rings, ring pointer updates are done through FW and
> * hence written to a shared memory location that is read by FW
> @@ -869,7 +868,11 @@ void ath11k_hal_srng_access_end(struct ath11k_base *ab, struct hal_srng *srng)
> WRITE_ONCE(*srng->u.src_ring.hp_addr, srng->u.src_ring.hp);
> } else {
> srng->u.dst_ring.last_hp = *srng->u.dst_ring.hp_addr;
> - *srng->u.dst_ring.tp_addr = srng->u.dst_ring.tp;
> + /* Make sure descriptor is read before updating the
> + * tail pointer.
> + */
> + dma_mb();
> + WRITE_ONCE(*srng->u.dst_ring.tp_addr, srng->u.dst_ring.tp);
> }
> } else {
> if (srng->ring_dir == HAL_SRNG_DIR_SRC) {
> @@ -885,6 +888,10 @@ void ath11k_hal_srng_access_end(struct ath11k_base *ab, struct hal_srng *srng)
> srng->u.src_ring.hp);
> } else {
> srng->u.dst_ring.last_hp = *srng->u.dst_ring.hp_addr;
> + /* Make sure descriptor is read before updating the
> + * tail pointer.
> + */
> + mb();
> ath11k_hif_write32(ab,
> (unsigned long)srng->u.dst_ring.tp_addr -
> (unsigned long)ab->mem,
Reviewed-by: Baochen Qiang <quic_bqiang@...cinc.com>
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