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Message-ID: <175098027014.1394278.11992805068398675511.robh@kernel.org>
Date: Thu, 26 Jun 2025 18:24:30 -0500
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
Cc: Andy Yan <andyshrk@....com>, David Airlie <airlied@...il.com>,
	Heiko Stübner <heiko@...ech.de>,
	linux-arm-kernel@...ts.infradead.org,
	Andy Yan <andy.yan@...k-chips.com>,
	Conor Dooley <conor+dt@...nel.org>, devicetree@...r.kernel.org,
	Krzysztof Kozlowski <krzk+dt@...nel.org>, stable@...r.kernel.org,
	linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
	dri-devel@...ts.freedesktop.org, Maxime Ripard <mripard@...nel.org>,
	Sandy Huang <hjc@...k-chips.com>, kernel@...labora.com,
	Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
	Thomas Zimmermann <tzimmermann@...e.de>,
	Simona Vetter <simona@...ll.ch>
Subject: Re: [PATCH 1/3] dt-bindings: display: vop2: Add optional PLL clock
 property for rk3576


On Thu, 12 Jun 2025 00:47:47 +0300, Cristian Ciocaltea wrote:
> As with the RK3588 SoC, RK3576 also allows the use of HDMI PHY PLL as an
> alternative and more accurate pixel clock source for VOP2.
> 
> Document the optional PLL clock property.
> 
> Moreover, given that this is part of a series intended to address some
> recent display problems, provide the appropriate tags to facilitate
> backporting.
> 
> Fixes: c3b7c5a4d7c1 ("dt-bindings: display: vop2: Add rk3576 support")
> Cc: stable@...r.kernel.org
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
> ---
>  .../bindings/display/rockchip/rockchip-vop2.yaml   | 56 +++++++++++++++++-----
>  1 file changed, 44 insertions(+), 12 deletions(-)
> 

Reviewed-by: Rob Herring (Arm) <robh@...nel.org>


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