linux-kernel - Re: (subset) [PATCH 0/3] arm64: dts: rockchip: Fix HDMI output on RK3576

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Message-ID: <175127486757.133006.13048263625888495346.b4-ty@sntech.de>
Date: Mon, 30 Jun 2025 11:14:38 +0200
From: Heiko Stuebner <heiko@...ech.de>
To: Sandy Huang <hjc@...k-chips.com>,
	Andy Yan <andy.yan@...k-chips.com>,
	Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
	Maxime Ripard <mripard@...nel.org>,
	Thomas Zimmermann <tzimmermann@...e.de>,
	David Airlie <airlied@...il.com>,
	Simona Vetter <simona@...ll.ch>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
Cc: Heiko Stuebner <heiko@...ech.de>,
	kernel@...labora.com,
	Andy Yan <andyshrk@....com>,
	Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
	dri-devel@...ts.freedesktop.org,
	devicetree@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-rockchip@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	stable@...r.kernel.org
Subject: Re: (subset) [PATCH 0/3] arm64: dts: rockchip: Fix HDMI output on RK3576


On Thu, 12 Jun 2025 00:47:46 +0300, Cristian Ciocaltea wrote:
> Since commit c871a311edf0 ("phy: rockchip: samsung-hdptx: Setup TMDS
> char rate via phy_configure_opts_hdmi"), the workaround of passing the
> PHY rate from DW HDMI QP bridge driver via phy_set_bus_width() became
> partially broken, unless the rate adjustment is done as with RK3588,
> i.e. by CCF from VOP2.
> 
> Attempting to fix this up at PHY level would not only introduce
> additional hacks, but it would also fail to adequately resolve the
> display issues that are a consequence of the system CRU limitations.
> 
> [...]

Applied, thanks!

[1/3] dt-bindings: display: vop2: Add optional PLL clock property for rk3576
      commit: 3832dc42aed9b047ccecebf5917d008bd2dac940

Best regards,
-- 
Heiko Stuebner <heiko@...ech.de>