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Message-ID: <3928de74-2266-42db-91bc-354832a94518@ti.com>
Date: Thu, 26 Jun 2025 17:30:58 +0530
From: Siddharth Vadapalli <s-vadapalli@...com>
To: Andrew Lunn <andrew@...n.ch>
CC: Siddharth Vadapalli <s-vadapalli@...com>,
        Matthias Schiffer
	<matthias.schiffer@...tq-group.com>,
        Andrew Lunn <andrew+netdev@...n.ch>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>, Rob
 Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor
 Dooley <conor+dt@...nel.org>,
        Andy Whitcroft <apw@...onical.com>,
        Dwaipayan
 Ray <dwaipayanray1@...il.com>,
        Lukas Bulwahn <lukas.bulwahn@...il.com>,
        Joe
 Perches <joe@...ches.com>, Jonathan Corbet <corbet@....net>,
        Nishanth Menon
	<nm@...com>, Vignesh Raghavendra <vigneshr@...com>,
        Roger Quadros
	<rogerq@...nel.org>, Tero Kristo <kristo@...nel.org>,
        <linux-doc@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <netdev@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>, <linux@...tq-group.com>,
        Maxime
 Chevallier <maxime.chevallier@...tlin.com>
Subject: Re: [PATCH net-next v2 2/3] net: ethernet: ti: am65-cpsw: fixup PHY
 mode for fixed RGMII TX delay

On Thu, Jun 26, 2025 at 01:58:07PM +0200, Andrew Lunn wrote:
> On Thu, Jun 26, 2025 at 03:10:50PM +0530, Siddharth Vadapalli wrote:
> > On Tue, Jun 24, 2025 at 12:53:33PM +0200, Matthias Schiffer wrote:
> > 
> > Hello Matthias,
> > 
> > > All am65-cpsw controllers have a fixed TX delay, so the PHY interface
> > > mode must be fixed up to account for this.
> > > 
> > > Modes that claim to a delay on the PCB can't actually work. Warn people
> > > to update their Device Trees if one of the unsupported modes is specified.
> > > 
> > > Signed-off-by: Matthias Schiffer <matthias.schiffer@...tq-group.com>
> > > Reviewed-by: Maxime Chevallier <maxime.chevallier@...tlin.com>
> > > Reviewed-by: Andrew Lunn <andrew@...n.ch>
> > > ---
> > >  drivers/net/ethernet/ti/am65-cpsw-nuss.c | 27 ++++++++++++++++++++++--
> > >  1 file changed, 25 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c
> > > index f20d1ff192efe..519757e618ad0 100644
> > > --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c
> > > +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c
> > > @@ -2602,6 +2602,7 @@ static int am65_cpsw_nuss_init_slave_ports(struct am65_cpsw_common *common)
> > >  		return -ENOENT;
> > >  
> > >  	for_each_child_of_node(node, port_np) {
> > > +		phy_interface_t phy_if;
> > >  		struct am65_cpsw_port *port;
> > >  		u32 port_id;
> > >  
> > > @@ -2667,14 +2668,36 @@ static int am65_cpsw_nuss_init_slave_ports(struct am65_cpsw_common *common)
> > >  
> > >  		/* get phy/link info */
> > >  		port->slave.port_np = of_node_get(port_np);
> > > -		ret = of_get_phy_mode(port_np, &port->slave.phy_if);
> > > +		ret = of_get_phy_mode(port_np, &phy_if);
> > >  		if (ret) {
> > >  			dev_err(dev, "%pOF read phy-mode err %d\n",
> > >  				port_np, ret);
> > >  			goto of_node_put;
> > >  		}
> > >  
> > > -		ret = phy_set_mode_ext(port->slave.ifphy, PHY_MODE_ETHERNET, port->slave.phy_if);
> > > +		/* CPSW controllers supported by this driver have a fixed
> > > +		 * internal TX delay in RGMII mode. Fix up PHY mode to account
> > > +		 * for this and warn about Device Trees that claim to have a TX
> > > +		 * delay on the PCB.
> > > +		 */
> > > +		switch (phy_if) {
> > > +		case PHY_INTERFACE_MODE_RGMII_ID:
> > > +			phy_if = PHY_INTERFACE_MODE_RGMII_RXID;
> > > +			break;
> > > +		case PHY_INTERFACE_MODE_RGMII_TXID:
> > > +			phy_if = PHY_INTERFACE_MODE_RGMII;
> > > +			break;
> > > +		case PHY_INTERFACE_MODE_RGMII:
> > > +		case PHY_INTERFACE_MODE_RGMII_RXID:
> > > +			dev_warn(dev,
> > > +				 "RGMII mode without internal TX delay unsupported; please fix your Device Tree\n");
> > 
> > Existing users designed boards and enabled Ethernet functionality using
> > "rgmii-rxid" in the device-tree and implementing the PCB traces in a
> > way that they interpret "rgmii-rxid". So their (mis)interpretation of
> > it is being challenged by the series. While it is true that we are updating
> > the bindings and driver to move towards the correct definition, I believe that
> > the above message would cause confusion. Would it be alright to update it to
> > something similar to:
> > 
> > "Interpretation of RGMII delays has been corrected; no functional impact; please fix your Device Tree"
> 
> It is dev_warn() not dev_err(), so it should be read as a warning. And
> the device will continue to probe and work. So I think the message is
> O.K. What we don't want is DT developers thinking they can just ignore
> it. So i would keep it reasonably strongly worded.

Thank you for the clarification. I have no further concerns and the
patch looks good to me.

Reviewed-by: Siddharth Vadapalli <s-vadapalli@...com>

Regards,
Siddharth.

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