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Message-ID: <tl5fckhrivaqfyzwyb2o2a7gykpigwend7z2nduqgbbej3hqbs@vxxtsadhtdmt>
Date: Fri, 27 Jun 2025 16:38:08 +0200
From: Jorge Marques <gastmaier@...il.com>
To: Krzysztof Kozlowski <krzk@...nel.org>
Cc: Jorge Marques <jorge.marques@...log.com>,
Alexandre Belloni <alexandre.belloni@...tlin.com>, Frank Li <Frank.Li@....com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
linux-i3c@...ts.infradead.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 1/2] dt-bindings: i3c: Add adi-i3c-master
On Fri, Jun 27, 2025 at 08:56:55AM +0200, Krzysztof Kozlowski wrote:
> On Thu, Jun 26, 2025 at 12:07:36PM +0200, Jorge Marques wrote:
> > Add bindings doc for ADI I3C Controller IP core, a FPGA synthesizable IP
> > core that implements the MIPI I3C Basic controller specification.
>
> How did you resolve my last comment? I don't see any explanation -
> neither here nor in the binding description. Binding description is
> actually better place, I think now.
>
> Best regards,
> Krzysztof
>
Hi Krzysztof,
I forgot to condense out discussion on v4.
What about this binding description:
description: |
FPGA-based I3C controller designed to interface with I3C and I2C
peripherals, implementing a subset of the I3C-basic specification.
The IP core is tested on arm, microblaze, and arm64 architectures.
It takes one or two clocks, axi and i3c. If only axi is provided,
then there is no clock signal to the i3c input clock pin and axi
clock drives the whole IP. The compatible is suffixed by 1.00.a
foreseeing future controllers by Analog Devices Inc. and breaking
changes.
https://analogdevicesinc.github.io/hdl/library/i3c_controller
Further, deeper descriptions are available at the linked doc.
Best regards,
Jorge
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