[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <SJ1PR11MB6083B94467DD85C8C2DF33D9FC45A@SJ1PR11MB6083.namprd11.prod.outlook.com>
Date: Fri, 27 Jun 2025 16:28:42 +0000
From: "Luck, Tony" <tony.luck@...el.com>
To: "Hunter, Adrian" <adrian.hunter@...el.com>, "Hansen, Dave"
<dave.hansen@...el.com>
CC: "Annapurve, Vishal" <vannapurve@...gle.com>, Borislav Petkov
<bp@...en8.de>, Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar
<mingo@...hat.com>, Dave Hansen <dave.hansen@...ux.intel.com>,
"x86@...nel.org" <x86@...nel.org>, H Peter Anvin <hpa@...or.com>,
"linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"kvm@...r.kernel.org" <kvm@...r.kernel.org>, "Edgecombe, Rick P"
<rick.p.edgecombe@...el.com>, "kirill.shutemov@...ux.intel.com"
<kirill.shutemov@...ux.intel.com>, "Huang, Kai" <kai.huang@...el.com>,
"Chatre, Reinette" <reinette.chatre@...el.com>, "Li, Xiaoyao"
<xiaoyao.li@...el.com>, "tony.lindgren@...ux.intel.com"
<tony.lindgren@...ux.intel.com>, "binbin.wu@...ux.intel.com"
<binbin.wu@...ux.intel.com>, "Yamahata, Isaku" <isaku.yamahata@...el.com>,
"Zhao, Yan Y" <yan.y.zhao@...el.com>, "Gao, Chao" <chao.gao@...el.com>,
"pbonzini@...hat.com" <pbonzini@...hat.com>, "seanjc@...gle.com"
<seanjc@...gle.com>
Subject: RE: [PATCH 1/2] x86/mce: Fix missing address mask in recovery for
errors in TDX/SEAM non-root mode
> >> If ->addr isn't really an address that software can do much with,
> >> shouldn't we mask MCI_ADDR_PHYSADDR off up front, like in mce_read_aux()?
> >
> > Would that mean no one would know if the mce addr had KeyID bits or not?
>
> Current design, to keep the bits in mce addr, is from Tony's patch:
>
> x86/mce: Mask out non-address bits from machine check bank
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=8a01ec97dc066009dd89e43bfcf55644f2dd6d19
>
> Assuming that is not altered, a tidy-up is still possible like:
>
> diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
> index 6c77c03139f7..b469b7a7ecfa 100644
> --- a/arch/x86/include/asm/mce.h
> +++ b/arch/x86/include/asm/mce.h
> @@ -386,4 +386,14 @@ static inline void mce_amd_feature_init(struct cpuinfo_x86 *c) { }
>
> unsigned long copy_mc_fragile_handle_tail(char *to, char *from, unsigned len);
>
> +static inline unsigned long mce_addr_to_phys(u64 mce_addr)
> +{
> + return mce_addr & MCI_ADDR_PHYSADDR;
> +}
> +
> +static inline unsigned long mce_addr_to_pfn(u64 mce_addr)
> +{
> + return mce_addr_to_phys(mce_addr) >> PAGE_SHIFT;
> +}
> +
> #endif /* _ASM_X86_MCE_H */
I like this. Can you write up a patch with a commit message please?
-Tony
Powered by blists - more mailing lists