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Message-ID: <20250627191555.GD1776@horms.kernel.org>
Date: Fri, 27 Jun 2025 20:15:55 +0100
From: Simon Horman <horms@...nel.org>
To: Théo Lebrun <theo.lebrun@...tlin.com>
Cc: Andrew Lunn <andrew+netdev@...n.ch>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Nicolas Ferre <nicolas.ferre@...rochip.com>,
Claudiu Beznea <claudiu.beznea@...on.dev>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>,
Samuel Holland <samuel.holland@...ive.com>,
Richard Cochran <richardcochran@...il.com>,
Russell King <linux@...linux.org.uk>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Vladimir Kondratiev <vladimir.kondratiev@...ileye.com>,
Gregory CLEMENT <gregory.clement@...tlin.com>,
Cyrille Pitchen <cyrille.pitchen@...el.com>,
Harini Katakam <harini.katakam@...inx.com>,
Rafal Ozieblo <rafalo@...ence.com>,
Haavard Skinnemoen <hskinnemoen@...el.com>,
Jeff Garzik <jeff@...zik.org>, netdev@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org, linux-mips@...r.kernel.org,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Tawfik Bayouk <tawfik.bayouk@...ileye.com>
Subject: Re: [PATCH net-next v2 16/18] MIPS: mobileye: add EyeQ5 DMA IOCU
support
On Fri, Jun 27, 2025 at 11:09:02AM +0200, Théo Lebrun wrote:
> Both Cadence GEM Ethernet controllers on EyeQ5 are hardwired through CM3
> IO Coherency Units (IOCU). For DMA coherent accesses, BIT(36) must be
> set in DMA addresses.
>
> Implement that in platform-specific dma_map_ops which get attached to
> both instances of `cdns,eyeq5-gem` through a notifier block.
>
> Signed-off-by: Théo Lebrun <theo.lebrun@...tlin.com>
...
> diff --git a/arch/mips/mobileye/eyeq5-iocu-dma.c b/arch/mips/mobileye/eyeq5-iocu-dma.c
...
> +const struct dma_map_ops eyeq5_iocu_ops = {
> + .alloc = eyeq5_iocu_alloc,
> + .free = eyeq5_iocu_free,
> + .alloc_pages_op = dma_direct_alloc_pages,
> + .free_pages = dma_direct_free_pages,
> + .mmap = eyeq5_iocu_mmap,
> + .get_sgtable = eyeq5_iocu_get_sgtable,
> + .map_page = eyeq5_iocu_map_page,
> + .unmap_page = eyeq5_iocu_unmap_page,
> + .map_sg = eyeq5_iocu_map_sg,
> + .unmap_sg = eyeq5_iocu_unmap_sg,
> + .get_required_mask = dma_direct_get_required_mask,
> +};
> +EXPORT_SYMBOL(eyeq5_iocu_ops);
Hi Théo,
Does eyeq5_iocu_ops need to be exported?
If so it should probably be declared in a header file somewhere.
But I if not probably the EXPORT_SYMBOL line should be
dropped, and the structure made static.
Flagged by Sparse.
> +
> +static int eyeq5_iocu_notifier(struct notifier_block *nb,
> + unsigned long event,
> + void *data)
> +{
> + struct device *dev = data;
> +
> + /*
> + * IOCU routing is hardwired; we must use our above custom
> + * routines for cache-coherent DMA on ethernet interfaces.
> + */
> + if (event == BUS_NOTIFY_ADD_DEVICE &&
> + device_is_compatible(dev, "mobileye,eyeq5-gem")) {
> + set_dma_ops(dev, &eyeq5_iocu_ops);
> + return NOTIFY_OK;
> + }
> +
> + return NOTIFY_DONE;
> +}
...
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