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Message-ID: <aF5k-Scgk6KTI_uQ@hovoldconsulting.com>
Date: Fri, 27 Jun 2025 11:31:37 +0200
From: Johan Hovold <johan@...nel.org>
To: Ziyue Zhang <quic_ziyuzhan@...cinc.com>
Cc: andersson@...nel.org, konradybcio@...nel.org, robh@...nel.org,
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kw@...ux.com, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-pci@...r.kernel.org, linux-phy@...ts.infradead.org,
qiang.yu@....qualcomm.com, quic_krichai@...cinc.com,
quic_vbadigan@...cinc.com
Subject: Re: [PATCH v7 1/5] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy:
Update pcie phy bindings for qcs8300
On Wed, Jun 25, 2025 at 05:25:35PM +0800, Ziyue Zhang wrote:
> The gcc_aux_clk is not required by the PCIe PHY on qcs8300 and is not
> specified in the device tree node. Hence, move the qcs8300 phy
> compatibility entry into the list of PHYs that require six clocks.
>
> As no compatible need the entry which require seven clocks, delete it.
Please add the missing Fixes tag.
> Signed-off-by: Ziyue Zhang <quic_ziyuzhan@...cinc.com>
> Acked-by: Rob Herring (Arm) <robh@...nel.org>
> ---
This patch depends on
https://lore.kernel.org/lkml/20250625090048.624399-2-quic_ziyuzhan@quicinc.com/
(which you point out in the cover letter), but you should be removing
the bogus 'phy_aux' clock when removing the last user and not before.
Johan
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