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Message-ID: <aGD7Pvua1OCdqfb3@calculate>
Date: Sun, 29 Jun 2025 16:37:18 +0800
From: Zixian Zeng <sycamoremoon376@...il.com>
To: Tudor Ambarus <tudor.ambarus@...aro.org>,
Pratyush Yadav <pratyush@...nel.org>,
Michael Walle <mwalle@...nel.org>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
Chen Wang <unicorn_wang@...look.com>,
Inochi Amaoto <inochiama@...il.com>,
Mark Brown <broonie@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>,
Longbin Li <looong.bin@...il.com>
Cc: linux-mtd@...ts.infradead.org, linux-kernel@...r.kernel.org,
sophgo@...ts.linux.dev, linux-spi@...r.kernel.org,
devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v3 4/4] riscv: dts: sophgo: Add SPI NOR node for SG2042
On Sun, Jun 29, 2025 at 04:23:13PM +0800, Zixian Zeng wrote:
> Add SPI-NOR controller and flash nodes to device tree for SG2042.
>
> Signed-off-by: Zixian Zeng <sycamoremoon376@...il.com>
> ---
> .../riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts | 24 ++++++++++++++++++++++
> arch/riscv/boot/dts/sophgo/sg2042.dtsi | 24 ++++++++++++++++++++++
> 2 files changed, 48 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts b/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts
> index ef3a602172b1e5bf3dcf54a8cacdad5172b7f50e..554ec14d58453a44a02a82da40a7aedb80d61dc9 100644
> --- a/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts
> +++ b/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts
> @@ -138,6 +138,30 @@ &sd {
> status = "okay";
> };
>
> +&spifmc0 {
> + status = "okay";
> +
> + flash@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <100000000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + };
> +};
> +
> +&spifmc1 {
> + status = "okay";
> +
> + flash@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <100000000>;
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + };
> +};
> +
> &uart0 {
> pinctrl-0 = <&uart0_cfg>;
> pinctrl-names = "default";
> diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
> index 85636d1798f11804546ed8606595ace1b4cb2a2f..0e1fcb54480af71147d0e71178a8eb08a31b75c3 100644
> --- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
> @@ -48,6 +48,30 @@ soc: soc {
> interrupt-parent = <&intc>;
> ranges;
>
> + spifmc0: spi@...0180000 {
> + compatible = "sophgo,sg2042-spifmc-nor", "sophgo,sg2044-spifmc-nor";
Sorry, This should be compatible = "sophgo,sg2042-spifmc-nor", binding
is changed in this patch series. My git branches are a bit messy, sorry
for taking your time for this issue.
> + reg = <0x70 0x00180000 0x0 0x1000000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&clkgen GATE_CLK_AHB_SF>;
> + interrupt-parent = <&intc>;
> + interrupts = <108 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rstgen RST_SF0>;
> + status = "disabled";
> + };
> +
> + spifmc1: spi@...2180000 {
> + compatible = "sophgo,sg2042-spifmc-nor", "sophgo,sg2044-spifmc-nor";
Same as above, sincerely
Best regards,
Zixian
> + reg = <0x70 0x02180000 0x0 0x1000000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&clkgen GATE_CLK_AHB_SF>;
> + interrupt-parent = <&intc>;
> + interrupts = <109 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rstgen RST_SF1>;
> + status = "disabled";
> + };
> +
> i2c0: i2c@...0005000 {
> compatible = "snps,designware-i2c";
> reg = <0x70 0x30005000 0x0 0x1000>;
>
> --
> 2.49.0
>
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