linux-kernel - Re: [PATCH net-next 2/2] net: mdio-mux: Add MDIO mux driver for Sophgo CV1800 SoCs

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Message-ID: <b8e37f3b89209f6674b0419ec28e0302de6b3c4e.camel@gmail.com>
Date: Mon, 30 Jun 2025 23:08:37 +0200
From: Alexander Sverdlin <alexander.sverdlin@...il.com>
To: Inochi Amaoto <inochiama@...il.com>, Andrew Lunn <andrew+netdev@...n.ch>
Cc: netdev@...r.kernel.org, devicetree@...r.kernel.org,
 sophgo@...ts.linux.dev, 	linux-kernel@...r.kernel.org,
 linux-riscv@...ts.infradead.org, Yixun Lan	 <dlan@...too.org>, Longbin Li
 <looong.bin@...il.com>
Subject: Re: [PATCH net-next 2/2] net: mdio-mux: Add MDIO mux driver for
 Sophgo CV1800 SoCs

Hi Inochi!

On Wed, 2025-06-11 at 16:02 +0800, Inochi Amaoto wrote:
> Add device driver for the mux driver for Sophgo CV18XX/SG200X
> series SoCs.
> 
> Signed-off-by: Inochi Amaoto <inochiama@...il.com>
> ---
>  drivers/net/mdio/Kconfig            |  10 +++
>  drivers/net/mdio/Makefile           |   1 +
>  drivers/net/mdio/mdio-mux-cv1800b.c | 119 ++++++++++++++++++++++++++++
>  3 files changed, 130 insertions(+)
>  create mode 100644 drivers/net/mdio/mdio-mux-cv1800b.c
> 
> diff --git a/drivers/net/mdio/Kconfig b/drivers/net/mdio/Kconfig
> index 7db40aaa079d..fe553016b77d 100644
> --- a/drivers/net/mdio/Kconfig
> +++ b/drivers/net/mdio/Kconfig
> @@ -278,5 +278,15 @@ config MDIO_BUS_MUX_MMIOREG
>  
>  	  Currently, only 8/16/32 bits registers are supported.
>  
> +config MDIO_BUS_MUX_SOPHGO_CV1800B
> +	tristate "Sophgo CV1800 MDIO multiplexer driver"
> +	depends on ARCH_SOPHGO || COMPILE_TEST
> +	depends on OF_MDIO && HAS_IOMEM
> +	select MDIO_BUS_MUX
> +	default m if ARCH_SOPHGO
> +	help
> +	  This module provides a driver for the MDIO multiplexer/glue of
> +	  the Sophgo CV1800 series SoC. The multiplexer connects either
> +	  the external or the internal MDIO bus to the parent bus.
>  
>  endif
> diff --git a/drivers/net/mdio/Makefile b/drivers/net/mdio/Makefile
> index c23778e73890..a67be2abc343 100644
> --- a/drivers/net/mdio/Makefile
> +++ b/drivers/net/mdio/Makefile
> @@ -33,3 +33,4 @@ obj-$(CONFIG_MDIO_BUS_MUX_MESON_G12A)	+= mdio-mux-meson-g12a.o
>  obj-$(CONFIG_MDIO_BUS_MUX_MESON_GXL)	+= mdio-mux-meson-gxl.o
>  obj-$(CONFIG_MDIO_BUS_MUX_MMIOREG) 	+= mdio-mux-mmioreg.o
>  obj-$(CONFIG_MDIO_BUS_MUX_MULTIPLEXER) 	+= mdio-mux-multiplexer.o
> +obj-$(CONFIG_MDIO_BUS_MUX_SOPHGO_CV1800B) += mdio-mux-cv1800b.o
> diff --git a/drivers/net/mdio/mdio-mux-cv1800b.c b/drivers/net/mdio/mdio-mux-cv1800b.c
> new file mode 100644
> index 000000000000..6c69e83c3dcd
> --- /dev/null
> +++ b/drivers/net/mdio/mdio-mux-cv1800b.c
> @@ -0,0 +1,119 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Sophgo CV1800 MDIO multiplexer driver
> + *
> + * Copyright (C) 2025 Inochi Amaoto <inochiama@...il.com>
> + */
> +
> +#include <linux/bitfield.h>
> +#include <linux/bits.h>
> +#include <linux/delay.h>
> +#include <linux/clk.h>
> +#include <linux/io.h>
> +#include <linux/mdio-mux.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +
> +#define EPHY_PAGE_SELECT		0x07c
> +#define EPHY_CTRL			0x800
> +#define EPHY_REG_SELECT			0x804
> +
> +#define EPHY_PAGE_SELECT_SRC		GENMASK(12, 8)
> +
> +#define EPHY_CTRL_ANALOG_SHUTDOWN	BIT(0)
> +#define EPHY_CTRL_USE_EXTPHY		BIT(7)
> +#define EPHY_CTRL_PHYMODE		BIT(8)
> +#define EPHY_CTRL_PHYMODE_SMI_RMII	1
> +#define EPHY_CTRL_EXTPHY_ID		GENMASK(15, 11)
> +
> +#define EPHY_REG_SELECT_MDIO		0
> +#define EPHY_REG_SELECT_APB		1
> +
> +#define CV1800B_MDIO_INTERNAL_ID	1
> +#define CV1800B_MDIO_EXTERNAL_ID	0
> +
> +struct cv1800b_mdio_mux {
> +	void __iomem *regs;
> +	void *mux_handle;
> +};
> +
> +static int cv1800b_enable_mdio(struct cv1800b_mdio_mux *mdmux, bool internal_phy)
> +{
> +	u32 val;
> +
> +	val = readl(mdmux->regs + EPHY_CTRL);
> +
> +	if (internal_phy)
> +		val &= ~EPHY_CTRL_USE_EXTPHY;
> +	else
> +		val |= EPHY_CTRL_USE_EXTPHY;
> +
> +	writel(val, mdmux->regs + EPHY_CTRL);
> +
> +	writel(EPHY_REG_SELECT_MDIO, mdmux->regs + EPHY_REG_SELECT);
> +
> +	return 0;
> +}

Seems that it actually doesn't multiplex the buses? As seen on SG2000:

# mdio mdio_mux-0.0
 DEV      PHY-ID  LINK
0x00  0x00435649  up
0x01  0x00435649  up
0x02  0x00000000  down
...
# mdio mdio_mux-0.1
 DEV      PHY-ID  LINK
0x00  0x00435649  up
0x01  0x00435649  up
...

The single internal PHY appears on two addresses (0 and 1) and on both buses.
Maybe it just switches the external MDIO master on/off?
Seems that we need the documentation for this thing ;-)

BTW, above LINK up is unfortunately without any cable attached...

-- 
Alexander Sverdlin.