linux-kernel - Re: [PATCH v2 5/5] platform/x86:intel/pmc: Enable SSRAM support for Panther Lake

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Message-ID: <9fccdef1-aabd-730c-d031-99d8319fba11@linux.intel.com>
Date: Mon, 30 Jun 2025 14:28:29 +0300 (EEST)
From: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
To: Xi Pardee <xi.pardee@...ux.intel.com>
cc: irenic.rajneesh@...il.com, david.e.box@...ux.intel.com, 
    Hans de Goede <hdegoede@...hat.com>, platform-driver-x86@...r.kernel.org, 
    LKML <linux-kernel@...r.kernel.org>, linux-pm@...r.kernel.org
Subject: Re: [PATCH v2 5/5] platform/x86:intel/pmc: Enable SSRAM support for
 Panther Lake

On Tue, 24 Jun 2025, Xi Pardee wrote:

> Enable Panther Lake platforms to achieve PMC information from
> Intel PMC SSRAM Telemetry driver and substate requirements data
> from telemetry region.
> 
> Signed-off-by: Xi Pardee <xi.pardee@...ux.intel.com>
> ---
>  drivers/platform/x86/intel/pmc/core.h |  2 ++
>  drivers/platform/x86/intel/pmc/ptl.c  | 30 +++++++++++++++++++++++++++
>  2 files changed, 32 insertions(+)
> 
> diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/intel/pmc/core.h
> index d8c7b28493055..cdb32f2203cff 100644
> --- a/drivers/platform/x86/intel/pmc/core.h
> +++ b/drivers/platform/x86/intel/pmc/core.h
> @@ -301,6 +301,8 @@ enum ppfear_regs {
>  #define PTL_PMC_LTR_CUR_ASLT			0x1C28
>  #define PTL_PMC_LTR_CUR_PLT			0x1C2C
>  #define PTL_PCD_PMC_MMIO_REG_LEN		0x31A8
> +#define PTL_NUM_S0IX_BLOCKER			106
> +#define PTL_BLK_REQ_OFFSET			55
>  
>  /* SSRAM PMC Device ID */
>  /* LNL */
> diff --git a/drivers/platform/x86/intel/pmc/ptl.c b/drivers/platform/x86/intel/pmc/ptl.c
> index 394515af60d60..48be79b4e769f 100644
> --- a/drivers/platform/x86/intel/pmc/ptl.c
> +++ b/drivers/platform/x86/intel/pmc/ptl.c
> @@ -10,6 +10,17 @@
>  
>  #include "core.h"
>  
> +/* PMC SSRAM PMT Telemetry GUIDS */
> +#define PCDP_LPM_REQ_GUID 0x47179370
> +
> +/*
> + * Die Mapping to Product.
> + * Product PCDDie
> + * PTL-H   PCD-H
> + * PTL-P   PCD-P
> + * PTL-U   PCD-P
> + */
> +
>  static const struct pmc_bit_map ptl_pcdp_pfear_map[] = {
>  	{"PMC_0",               BIT(0)},
>  	{"FUSE_OSSE",           BIT(1)},
> @@ -515,6 +526,22 @@ static const struct pmc_reg_map ptl_pcdp_reg_map = {
>  	.lpm_live_status_offset = MTL_LPM_LIVE_STATUS_OFFSET,
>  	.s0ix_blocker_maps = ptl_pcdp_blk_maps,
>  	.s0ix_blocker_offset = LNL_S0IX_BLOCKER_OFFSET,
> +	.num_s0ix_blocker = PTL_NUM_S0IX_BLOCKER,
> +	.blocker_req_offset = PTL_BLK_REQ_OFFSET,
> +};
> +
> +static struct pmc_info ptl_pmc_info_list[] = {
> +	{
> +		.guid	= PCDP_LPM_REQ_GUID,
> +		.devid	= PMC_DEVID_PTL_PCDH,
> +		.map	= &ptl_pcdp_reg_map,
> +	},
> +	{
> +		.guid   = PCDP_LPM_REQ_GUID,
> +		.devid  = PMC_DEVID_PTL_PCDP,
> +		.map    = &ptl_pcdp_reg_map,
> +	},
> +	{}
>  };
>  
>  #define PTL_NPU_PCI_DEV                0xb03e
> @@ -543,6 +570,9 @@ static int ptl_core_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_in
>  }
>  
>  struct pmc_dev_info ptl_pmc_dev = {
> +	.pci_func = 2,
> +	.telem_info = SUB_REQ_BLK,
> +	.regmap_list = ptl_pmc_info_list,
>  	.map = &ptl_pcdp_reg_map,
>  	.suspend = cnl_suspend,
>  	.resume = ptl_resume,
> 

Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>

-- 
 i.