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Message-Id: <175138004317.29152.1836707203802204355.b4-ty@kernel.org>
Date: Tue, 01 Jul 2025 19:57:23 +0530
From: Manivannan Sadhasivam <mani@...nel.org>
To: frank.li@....com, l.stach@...gutronix.de, lpieralisi@...nel.org,
kwilczynski@...nel.org, robh@...nel.org, bhelgaas@...gle.com,
shawnguo@...nel.org, s.hauer@...gutronix.de, kernel@...gutronix.de,
festevam@...il.com, Richard Zhu <hongxing.zhu@....com>
Cc: linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
imx@...ts.linux.dev, linux-kernel@...r.kernel.org,
Frank Li <Frank.Li@....com>
Subject: Re: [PATCH v2] PCI: imx6: Correct the epc_features of i.MX8M chips
On Tue, 17 Jun 2025 15:34:41 +0800, Richard Zhu wrote:
> i.MX8MQ PCIes have three 64-bit BAR0/2/4 capable and programmable BARs.
> But i.MX8MM and i.MX8MP PCIes only have BAR0/BAR2 64bit programmable
> BARs, and one 256 bytes size fixed BAR4.
>
> Correct the epc_features for i.MX8MM and i.MX8MP PCIes here. i.MX8MQ is
> the same as i.MX8QXP, so set i.MX8MQ's epc_features to
> imx8q_pcie_epc_features.
>
> [...]
Applied, thanks!
[1/1] PCI: imx6: Correct the epc_features of i.MX8M chips
commit: 66ee525537be816b2accf4ad28ad33cd299ea492
Best regards,
--
Manivannan Sadhasivam <mani@...nel.org>
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