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Message-ID: <CAMuHMdXbr5Rb7SNzYTQz+rBNuRrLCC4mf+XauTFA8FArFZzfNQ@mail.gmail.com>
Date: Wed, 2 Jul 2025 15:37:14 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Prabhakar <prabhakar.csengg@...il.com>
Cc: Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Magnus Damm <magnus.damm@...il.com>, linux-renesas-soc@...r.kernel.org,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, Biju Das <biju.das.jz@...renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH 1/3] dt-bindings: clock: renesas,r9a09g077/87: Add
SDHI_CLKHS clock ID
Hi Prabhakar,
On Wed, 25 Jun 2025 at 16:17, Prabhakar <prabhakar.csengg@...il.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> Add the SDHI high-speed clock (SDHI_CLKHS) definition for the Renesas
> RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs. SDHI_CLKHS is used as
> a core clock for the SDHI IP and operates at 800MHz.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Thanks for your patch!
> include/dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h | 1 +
> include/dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h | 1 +
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will split, and queue in renesas-r9a09g077-dt-binding-defs resp.
renesas-r9a09g087-dt-binding-defs, to be shared by renesas-clk and
renesas-devel.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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