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Message-ID: <f1c4240d-a601-454b-9cc3-88ed8becb490@linaro.org>
Date: Fri, 4 Jul 2025 16:24:58 +0100
From: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
To: Stephan Gerhold <stephan.gerhold@...aro.org>,
 Bjorn Andersson <andersson@...nel.org>
Cc: Michael Turquette <mturquette@...libre.com>,
 Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Taniya Das <quic_tdas@...cinc.com>,
 Jagadeesh Kona <quic_jkona@...cinc.com>,
 Konrad Dybcio <konradybcio@...nel.org>, Abel Vesa <abel.vesa@...aro.org>,
 Johan Hovold <johan@...nel.org>, Stefan Schmidt <stefan.schmidt@...aro.org>,
 linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/6] clk: qcom: videocc-sm8550: Add separate frequency
 tables for X1E80100

On 01/07/2025 18:28, Stephan Gerhold wrote:
> X1E80100 videocc is identical to the one in SM8550, aside from slightly
> different recommended PLL frequencies. Add the separate frequency tables
> for that and apply them if the qcom,x1e80100-videocc compatible is used.
> 
> Signed-off-by: Stephan Gerhold <stephan.gerhold@...aro.org>
> ---
>   drivers/clk/qcom/Kconfig          |  2 +-
>   drivers/clk/qcom/videocc-sm8550.c | 29 +++++++++++++++++++++++++++++
>   2 files changed, 30 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
> index 26752bd79f508612347ce79fd3693359d4dd656d..53bbdbe0725bd1b37ecd4c6b15b0d31676d9f548 100644
> --- a/drivers/clk/qcom/Kconfig
> +++ b/drivers/clk/qcom/Kconfig
> @@ -1394,7 +1394,7 @@ config SM_VIDEOCC_8550
>   	select QCOM_GDSC
>   	help
>   	  Support for the video clock controller on Qualcomm Technologies, Inc.
> -	  SM8550 or SM8650 devices.
> +	  SM8550 or SM8650 or X1E80100 devices.
>   	  Say Y if you want to support video devices and functionality such as
>   	  video encode/decode.
>   
> diff --git a/drivers/clk/qcom/videocc-sm8550.c b/drivers/clk/qcom/videocc-sm8550.c
> index 3e5891b43ee404edc6c99bbf8f2583cb44df9e37..32a6505abe265472de4059c4a048f731fdbf1dfe 100644
> --- a/drivers/clk/qcom/videocc-sm8550.c
> +++ b/drivers/clk/qcom/videocc-sm8550.c
> @@ -145,6 +145,16 @@ static const struct freq_tbl ftbl_video_cc_mvs0_clk_src_sm8650[] = {
>   	{ }
>   };
>   
> +static const struct freq_tbl ftbl_video_cc_mvs0_clk_src_x1e80100[] = {
> +	F(576000000, P_VIDEO_CC_PLL0_OUT_MAIN, 1, 0, 0),
> +	F(720000000, P_VIDEO_CC_PLL0_OUT_MAIN, 1, 0, 0),
> +	F(1014000000, P_VIDEO_CC_PLL0_OUT_MAIN, 1, 0, 0),
> +	F(1098000000, P_VIDEO_CC_PLL0_OUT_MAIN, 1, 0, 0),
> +	F(1332000000, P_VIDEO_CC_PLL0_OUT_MAIN, 1, 0, 0),
> +	F(1443000000, P_VIDEO_CC_PLL0_OUT_MAIN, 1, 0, 0),
> +	{ }
> +};
> +
>   static struct clk_rcg2 video_cc_mvs0_clk_src = {
>   	.cmd_rcgr = 0x8000,
>   	.mnd_width = 0,
> @@ -177,6 +187,15 @@ static const struct freq_tbl ftbl_video_cc_mvs1_clk_src_sm8650[] = {
>   	{ }
>   };
>   
> +static const struct freq_tbl ftbl_video_cc_mvs1_clk_src_x1e80100[] = {
> +	F(840000000, P_VIDEO_CC_PLL1_OUT_MAIN, 1, 0, 0),
> +	F(1050000000, P_VIDEO_CC_PLL1_OUT_MAIN, 1, 0, 0),
> +	F(1350000000, P_VIDEO_CC_PLL1_OUT_MAIN, 1, 0, 0),
> +	F(1500000000, P_VIDEO_CC_PLL1_OUT_MAIN, 1, 0, 0),
> +	F(1650000000, P_VIDEO_CC_PLL1_OUT_MAIN, 1, 0, 0),
> +	{ }
> +};
> +
>   static struct clk_rcg2 video_cc_mvs1_clk_src = {
>   	.cmd_rcgr = 0x8018,
>   	.mnd_width = 0,
> @@ -559,12 +578,22 @@ static const struct qcom_cc_desc video_cc_sm8550_desc = {
>   static const struct of_device_id video_cc_sm8550_match_table[] = {
>   	{ .compatible = "qcom,sm8550-videocc" },
>   	{ .compatible = "qcom,sm8650-videocc" },
> +	{ .compatible = "qcom,x1e80100-videocc" },
>   	{ }
>   };
>   MODULE_DEVICE_TABLE(of, video_cc_sm8550_match_table);
>   
>   static int video_cc_sm8550_probe(struct platform_device *pdev)
>   {
> +	if (of_device_is_compatible(pdev->dev.of_node, "qcom,x1e80100-videocc")) {
> +		video_cc_pll0_config.l = 0x1e;
> +		video_cc_pll0_config.alpha = 0x0000;
> +		video_cc_pll1_config.l = 0x2b;
> +		video_cc_pll1_config.alpha = 0xc000;
> +		video_cc_mvs0_clk_src.freq_tbl = ftbl_video_cc_mvs0_clk_src_x1e80100;
> +		video_cc_mvs1_clk_src.freq_tbl = ftbl_video_cc_mvs1_clk_src_x1e80100;
> +	}
> +
>   	if (of_device_is_compatible(pdev->dev.of_node, "qcom,sm8650-videocc")) {
>   		video_cc_pll0_config.l = 0x1e;
>   		video_cc_pll0_config.alpha = 0xa000;
> 

Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@...aro.org>

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