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Message-ID: <cbfb9159-1c80-4db4-b5d7-036980a1a44a@quicinc.com>
Date: Fri, 4 Jul 2025 16:14:35 +0800
From: Jie Gan <quic_jiegan@...cinc.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, Jie Gan <jie.gan@....qualcomm.com>,
Suzuki K Poulose <suzuki.poulose@....com>,
Mike Leach
<mike.leach@...aro.org>,
James Clark <james.clark@...aro.org>, Rob Herring
<robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio
<konradybcio@...nel.org>
CC: <coresight@...ts.linaro.org>, <linux-arm-kernel@...ts.infradead.org>,
<linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 0/2] Enable CTCU device for QCS8300
On 7/4/2025 4:10 PM, Krzysztof Kozlowski wrote:
> On 04/07/2025 10:07, Jie Gan wrote:
>>
>>>
>>>> offsets for the ATID and IRQ registers, because they integrate the same
>>>> version of the CTCU hardware.
>>>>
>>>> So I propose introducing a common compatible string,
>>>> "coresight-ctcu-v2", to simplify the device tree configuration for these
>>>> platforms.
>>>
>>> This is explained in writing bindings.
>>
>> Yeah, explained in the code lines..
> I meant explained in writing bindings document. Please read writing
> bindings first.
OK, will check, sorry for the misunderstanding.
Thanks,
Jie
>
> Best regards,
> Krzysztof
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