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Message-ID: <9c11bd92-ff2e-493f-8e71-fd8d3f8b32e6@kernel.org>
Date: Fri, 4 Jul 2025 10:10:06 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Jie Gan <quic_jiegan@...cinc.com>, Jie Gan <jie.gan@....qualcomm.com>,
 Suzuki K Poulose <suzuki.poulose@....com>, Mike Leach
 <mike.leach@...aro.org>, James Clark <james.clark@...aro.org>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Bjorn Andersson <andersson@...nel.org>,
 Konrad Dybcio <konradybcio@...nel.org>
Cc: coresight@...ts.linaro.org, linux-arm-kernel@...ts.infradead.org,
 linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 0/2] Enable CTCU device for QCS8300

On 04/07/2025 10:07, Jie Gan wrote:
> 
>>
>>> offsets for the ATID and IRQ registers, because they integrate the same
>>> version of the CTCU hardware.
>>>
>>> So I propose introducing a common compatible string,
>>> "coresight-ctcu-v2", to simplify the device tree configuration for these
>>> platforms.
>>
>> This is explained in writing bindings.
> 
> Yeah, explained in the code lines..
I meant explained in writing bindings document. Please read writing
bindings first.

Best regards,
Krzysztof

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