linux-kernel - Re: [PATCH v2] PCI: imx6: Correct the epc

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Message-ID: <pxxwlm6su6ugfo4m7borpgvvlczfrhdarzcy45fipqwvxaxban@u223udsukdwc>
Date: Tue, 8 Jul 2025 13:11:59 +0530
From: "mani@...nel.org" <mani@...nel.org>
To: Hongxing Zhu <hongxing.zhu@....com>
Cc: Bjorn Helgaas <helgaas@...nel.org>, Frank Li <frank.li@....com>, 
	"l.stach@...gutronix.de" <l.stach@...gutronix.de>, "lpieralisi@...nel.org" <lpieralisi@...nel.org>, 
	"kwilczynski@...nel.org" <kwilczynski@...nel.org>, "robh@...nel.org" <robh@...nel.org>, 
	"bhelgaas@...gle.com" <bhelgaas@...gle.com>, "shawnguo@...nel.org" <shawnguo@...nel.org>, 
	"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>, "kernel@...gutronix.de" <kernel@...gutronix.de>, 
	"festevam@...il.com" <festevam@...il.com>, "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>, 
	"linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>, "imx@...ts.linux.dev" <imx@...ts.linux.dev>, 
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2] PCI: imx6: Correct the epc_features of i.MX8M chips

On Tue, Jul 08, 2025 at 07:34:57AM GMT, Hongxing Zhu wrote:
> > -----Original Message-----
> > From: Bjorn Helgaas <helgaas@...nel.org>
> > Sent: 2025年7月8日 3:34
> > To: Hongxing Zhu <hongxing.zhu@....com>
> > Cc: Frank Li <frank.li@....com>; l.stach@...gutronix.de;
> > lpieralisi@...nel.org; kwilczynski@...nel.org; mani@...nel.org;
> > robh@...nel.org; bhelgaas@...gle.com; shawnguo@...nel.org;
> > s.hauer@...gutronix.de; kernel@...gutronix.de; festevam@...il.com;
> > linux-pci@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
> > imx@...ts.linux.dev; linux-kernel@...r.kernel.org
> > Subject: Re: [PATCH v2] PCI: imx6: Correct the epc_features of i.MX8M chips
> > 
> > On Tue, Jun 17, 2025 at 03:34:41PM +0800, Richard Zhu wrote:
> > > i.MX8MQ PCIes have three 64-bit BAR0/2/4 capable and programmable
> > BARs.
> > > But i.MX8MM and i.MX8MP PCIes only have BAR0/BAR2 64bit
> > programmable
> > > BARs, and one 256 bytes size fixed BAR4.
> > >
> > > Correct the epc_features for i.MX8MM and i.MX8MP PCIes here. i.MX8MQ
> > > is the same as i.MX8QXP, so set i.MX8MQ's epc_features to
> > > imx8q_pcie_epc_features.
> > >
> > > Fixes: 75c2f26da03f ("PCI: imx6: Add i.MX PCIe EP mode support")
> > > Signed-off-by: Richard Zhu <hongxing.zhu@....com>
> > > Reviewed-by: Frank Li <Frank.Li@....com>
> > 
> > "Correct the epc_features" doesn't include any specific information, and it's
> > hard to extract the changes for a device from the commit log.
> > 
> > This is really two fixes that should be separated so the commit logs can be
> > specific:
> Yes, it's right.
> Since it's just one line change for i.MX8MQ. So, I combine the changes into
> this commit for i.MX8M chips.
> 
> Hi Mani:
> Since it had been applied, I don't know how to proceed.
> Should I separate this commit into two patches, and re-send them again?
> Thanks.
> 

I've now dropped the patch from controller/imx6. Please resend them. Also, CC
the stable list with relevant Fixes tag.

- Mani

> Best Regards
> Richard Zhu
> > 
> >   - For IMX8MQ_EP, use imx8q_pcie_epc_features (64-bit BARs 0, 2, 4)
> >     instead of imx8m_pcie_epc_features (64-bit BARs 0, 2).
> > 
> >   - For IMX8MM_EP and IMX8MP_EP, add fixed 256-byte BAR 4 in
> >     imx8m_pcie_epc_features.
> > 
> > > ---
> > >  drivers/pci/controller/dwc/pci-imx6.c | 4 +++-
> > >  1 file changed, 3 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c
> > > b/drivers/pci/controller/dwc/pci-imx6.c
> > > index 5a38cfaf989b..9754cc6e09b9 100644
> > > --- a/drivers/pci/controller/dwc/pci-imx6.c
> > > +++ b/drivers/pci/controller/dwc/pci-imx6.c
> > > @@ -1385,6 +1385,8 @@ static const struct pci_epc_features
> > imx8m_pcie_epc_features = {
> > >  	.msix_capable = false,
> > >  	.bar[BAR_1] = { .type = BAR_RESERVED, },
> > >  	.bar[BAR_3] = { .type = BAR_RESERVED, },
> > > +	.bar[BAR_4] = { .type = BAR_FIXED, .fixed_size = SZ_256, },
> > > +	.bar[BAR_5] = { .type = BAR_RESERVED, },
> > >  	.align = SZ_64K,
> > >  };
> > >
> > > @@ -1912,7 +1914,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
> > >  		.mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,
> > >  		.mode_off[1] = IOMUXC_GPR12,
> > >  		.mode_mask[1] = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE,
> > > -		.epc_features = &imx8m_pcie_epc_features,
> > > +		.epc_features = &imx8q_pcie_epc_features,
> > >  		.init_phy = imx8mq_pcie_init_phy,
> > >  		.enable_ref_clk = imx8mm_pcie_enable_ref_clk,
> > >  	},
> > > --
> > > 2.37.1
> > >

-- 
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