linux-kernel - Re: [PATCH v4] selftests: riscv: add misaligned access testing

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Message-ID: <mvmecuognj7.fsf@suse.de>
Date: Thu, 10 Jul 2025 15:53:32 +0200
From: Andreas Schwab <schwab@...e.de>
To: Clément Léger <cleger@...osinc.com>
Cc: linux-kernel@...r.kernel.org,  linux-kselftest@...r.kernel.org,
  linux-riscv@...ts.infradead.org,  Palmer Dabbelt <palmer@...belt.com>,
  Paul Walmsley <paul.walmsley@...ive.com>,  Shuah Khan <shuah@...nel.org>,
  Alexandre Ghiti <alex@...ti.fr>
Subject: Re: [PATCH v4] selftests: riscv: add misaligned access testing

On Jul 10 2025, Clément Léger wrote:

> This selftest tests all the currently emulated instructions (except for
> the RV32 compressed ones which are left as a future exercise for a RV32
> user). For the FPU instructions, all the FPU registers are tested.

If that didn't catch the missing sign extension that I just fixed in
<https://lore.kernel.org/linux-riscv/mvmikk0goil.fsf@suse.de>, you
should consider extending the tests.

-- 
Andreas Schwab, SUSE Labs, schwab@...e.de
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