linux-kernel - Re: [PATCH 15/16] arm64: dts: axis: Add initial pinctrl support

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Message-ID: <78d46ee0-d53f-4980-aa90-c9111043ae90@kernel.org>
Date: Thu, 10 Jul 2025 09:04:54 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: ksk4725@...sia.com, Jesper Nilsson <jesper.nilsson@...s.com>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd
 <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Sylwester Nawrocki <s.nawrocki@...sung.com>,
 Chanwoo Choi <cw00.choi@...sung.com>, Alim Akhtar <alim.akhtar@...sung.com>,
 Linus Walleij <linus.walleij@...aro.org>, Tomasz Figa
 <tomasz.figa@...il.com>, Catalin Marinas <catalin.marinas@....com>,
 Will Deacon <will@...nel.org>, Arnd Bergmann <arnd@...db.de>,
 Ravi Patel <ravi.patel@...sung.com>, SungMin Park <smn1196@...sia.com>
Cc: kenkim <kenkim@...sia.com>, Jongshin Park <pjsin865@...sia.com>,
 GunWoo Kim <gwk1013@...sia.com>, HaGyeong Kim <hgkim05@...sia.com>,
 GyoungBo Min <mingyoungbo@...sia.com>,
 Pankaj Dubey <pankaj.dubey@...sung.com>, Shradha Todi
 <shradha.t@...sung.com>, Inbaraj E <inbaraj.e@...sung.com>,
 Swathi K S <swathi.ks@...sung.com>, Hrishikesh <hrishikesh.d@...sung.com>,
 Dongjin Yang <dj76.yang@...sung.com>, Sang Min Kim
 <hypmean.kim@...sung.com>, linux-kernel@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-samsung-soc@...r.kernel.org,
 linux-arm-kernel@...s.com, linux-clk@...r.kernel.org,
 devicetree@...r.kernel.org, linux-gpio@...r.kernel.org, soc@...ts.linux.dev
Subject: Re: [PATCH 15/16] arm64: dts: axis: Add initial pinctrl support

On 10/07/2025 02:20, ksk4725@...sia.com wrote:
> From: SeonGu Kang <ksk4725@...sia.com>
> 
> Add initial pin configuration nodes for the Axis ARTPEC-8 SoC.
> 
> Signed-off-by: Ravi Patel <ravi.patel@...sung.com>
> Signed-off-by: SeonGu Kang <ksk4725@...sia.com>
> ---
>  arch/arm64/boot/dts/axis/artpec-pinctrl.h     |  36 ++
>  arch/arm64/boot/dts/axis/artpec8-grizzly.dts  |   1 +
>  arch/arm64/boot/dts/axis/artpec8-pinctrl.dtsi | 373 ++++++++++++++++++
>  arch/arm64/boot/dts/axis/artpec8.dtsi         |  17 +

This belongs to the previous patch rather. You can split board DTS, though.

>  4 files changed, 427 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/axis/artpec-pinctrl.h
>  create mode 100644 arch/arm64/boot/dts/axis/artpec8-pinctrl.dtsi
> 
> diff --git a/arch/arm64/boot/dts/axis/artpec-pinctrl.h b/arch/arm64/boot/dts/axis/artpec-pinctrl.h
> new file mode 100644
> index 000000000000..c2c1e25b7f6a
> --- /dev/null
> +++ b/arch/arm64/boot/dts/axis/artpec-pinctrl.h
> @@ -0,0 +1,36 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Axis ARTPEC-8 SoC device tree pinctrl constants
> + *
> + * Copyright (c) 2022-2025 Samsung Electronics Co., Ltd.

First publish date was 2025, not 2022, so all these copyrights feel wrong.

> + *             https://www.samsung.com
> + * Copyright (c) 2022-2025  Axis Communications AB.
> + *             https://www.axis.com
> + */
> +


...

> +	i2s0_idle: i2s0-idle-pins {
> +		samsung,pins = "gpa1-4", "gpa1-5", "gpa1-6", "gpa1-7";
> +		samsung,pin-function = <ARTPEC_PIN_FUNC_INPUT>;
> +		samsung,pin-pud = <ARTPEC_PIN_PULL_UP>;
> +		samsung,pin-drv = <ARTPEC_PIN_DRV_SR3>;
> +	};
> +
> +	i2s1_bus: i2s1-bus-pins {
> +		samsung,pins = "gpa1-0", "gpa1-1", "gpa1-2", "gpa1-3";
> +		samsung,pin-function = <ARTPEC_PIN_FUNC_3>;
> +		samsung,pin-pud = <ARTPEC_PIN_PULL_UP>;
> +		samsung,pin-drv = <ARTPEC_PIN_DRV_SR3>;
> +	};
> +
> +	i2s1_idle: i2s1-idle-pins {
> +		samsung,pins = "gpa1-0", "gpa1-1", "gpa1-2", "gpa1-3";
> +		samsung,pin-function = <ARTPEC_PIN_FUNC_INPUT>;
> +		samsung,pin-pud = <ARTPEC_PIN_PULL_UP>;
> +		samsung,pin-drv = <ARTPEC_PIN_DRV_SR3>;
> +	};
> +
> +	hsi2c2_bus: hsi2c2-bus-pins {
> +		samsung,pins = "gpa0-6", "gpa0-7";

We sort nodes by pin names, usually. What sorting rule you applied here?



Best regards,
Krzysztof