linux-kernel - Re: [PATCH 1/1] iommu/sva: Invalidate KVA range on kernel TLB flush

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Message-ID: <d053739d-7fbe-46d8-9dcf-88e99cc5c60a@intel.com>
Date: Fri, 11 Jul 2025 07:36:20 -0700
From: Dave Hansen <dave.hansen@...el.com>
To: jacob.pan@...ux.microsoft.com, Baolu Lu <baolu.lu@...ux.intel.com>
Cc: Jason Gunthorpe <jgg@...dia.com>, Joerg Roedel <joro@...tes.org>,
 Will Deacon <will@...nel.org>, Robin Murphy <robin.murphy@....com>,
 Kevin Tian <kevin.tian@...el.com>, Jann Horn <jannh@...gle.com>,
 Vasant Hegde <vasant.hegde@....com>, Alistair Popple <apopple@...dia.com>,
 Peter Zijlstra <peterz@...radead.org>, Uladzislau Rezki <urezki@...il.com>,
 Jean-Philippe Brucker <jean-philippe@...aro.org>,
 Andy Lutomirski <luto@...nel.org>, iommu@...ts.linux.dev,
 security@...nel.org, linux-kernel@...r.kernel.org, stable@...r.kernel.org
Subject: Re: [PATCH 1/1] iommu/sva: Invalidate KVA range on kernel TLB flush

On 7/10/25 08:28, Jacob Pan wrote:
> why would IOMMU cache all the entries if the walk is not successful?

This was one of those things which the IOMMU folks could have gone
either direction on. But, they generally choose to mirror the CPU
behavior when they can.

The CPU does page walks the same way. It probably requires less logic
because the caches can be filled while walking down the tree and don't
have to be evicted if the walk is ultimately unsuccessful.