linux-kernel - Re: [PATCH v7 06/12] dt-bindings: pinctrl: deprecate SIUL2 pinctrl bindings

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Message-ID: <20250711-inquisitive-dainty-foxhound-6feeb4@krzk-bin>
Date: Fri, 11 Jul 2025 09:44:18 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Andrei Stefanescu <andrei.stefanescu@....nxp.com>
Cc: linus.walleij@...aro.org, brgl@...ev.pl, robh@...nel.org, 
	krzk+dt@...nel.org, conor+dt@...nel.org, chester62515@...il.com, mbrugger@...e.com, 
	Ghennadi.Procopciuc@....com, larisa.grigore@....com, lee@...nel.org, shawnguo@...nel.org, 
	s.hauer@...gutronix.de, festevam@...il.com, aisheng.dong@....com, ping.bai@....com, 
	gregkh@...uxfoundation.org, rafael@...nel.org, srini@...nel.org, linux-gpio@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	linux-arm-kernel@...ts.infradead.org, s32@....com, clizzi@...hat.com, aruizrui@...hat.com, 
	eballetb@...hat.com, echanude@...hat.com, kernel@...gutronix.de, imx@...ts.linux.dev, 
	vincent.guittot@...aro.org
Subject: Re: [PATCH v7 06/12] dt-bindings: pinctrl: deprecate SIUL2 pinctrl
 bindings

On Thu, Jul 10, 2025 at 05:20:29PM +0300, Andrei Stefanescu wrote:
> The existing SIUL2 pinctrl bindings don't correctly describe the
> hardware. The SIUL2 module also offers GPIO control and exposes some
> registers which contain information about the SoC. Adding drivers for
> these functionalities would result in incorrect bindings with a lot of
> carved out regions for registers. For more details see the discussions
> on the community [1] and [2].
> 
> The existing SIUL2 pinctrl dt-bindings will be deprecated. The new SIUL2
> MFD dt-bindings are to be used from now on.
> 
> [1] -
> https://lore.kernel.org/linux-gpio/20241003-overall-unblended-7139b17eae23@spud/
> [2] -
> https://lore.kernel.org/all/a924bbb6-96ec-40be-9d82-a76b2ab73afd@oss.nxp.com/

After fast glance I see only nvmem is outside and missing in these
bindings. I don't see a problem nvmem being a separate device node, so I
don't see justification for dropping old bindings.

Anyway, bring the full raltionale here - describe the memory layout
proving that you cannot add nvmem and GPIO in your system without
breaking ABI or without making this binding unreadable.

Best regards,
Krzysztof