lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID:
 <20250711-kernel-upstreaming-add_network_support-v1-1-4a66a17c94b3@blaize.com>
Date: Fri, 11 Jul 2025 13:36:18 +0000
From: Nikolaos Pasaloukos <nikolaos.pasaloukos@...ize.com>
To: James Cowgill <james.cowgill@...ize.com>,
        Matt Redfearn
	<matthew.redfearn@...ize.com>,
        Neil Jones <neil.jones@...ize.com>, Rob
 Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor
 Dooley <conor+dt@...nel.org>
CC: "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Nikolaos
 Pasaloukos <nikolaos.pasaloukos@...ize.com>
Subject: [PATCH 1/2] arm64/dts/blaize: Enable Ethernet support for BLZP1600

Enable the Synopsys gigabit Ethernet controller which is available
on the Blaize BLZP1600 SoC.

Due to the SoC IP block configuration, the max frame size cannot
exceed the 2030 bytes.

Signed-off-by: Nikolaos Pasaloukos <nikolaos.pasaloukos@...ize.com>
---
 arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi b/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi
index 5a6c882b2f57d57d304869dee877c996cbabb712..890f678ddbc43f84cb3cc16c9d2af6edb6350ecc 100644
--- a/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi
+++ b/arch/arm64/boot/dts/blaize/blaize-blzp1600.dtsi
@@ -213,5 +213,27 @@ arm_cc712: crypto@...000 {
 			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&scmi_clk 7>;
 		};
+
+		gmac: ethernet@...000 {
+			compatible = "snps,dwmac";
+			reg = <0x640000 0x8000>;
+			interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "macirq";
+			clocks = <&scmi_clk 29>, <&scmi_clk 71>;
+			clock-names = "stmmaceth", "pclk";
+			resets = <&scmi_rst 29>;
+			reset-names = "stmmaceth";
+			rx-fifo-depth = <4096>;
+			tx-fifo-depth = <4096>;
+			max-frame-size = <2030>;  /* Due to SoC IP configuration */
+			snps,axi-config = <&stmmac_axi_setup>;
+			status = "disabled";
+
+			stmmac_axi_setup: stmmac-axi-config {
+				snps,wr_osr_lmt = <0xf>;
+				snps,rd_osr_lmt = <0xf>;
+				snps,blen = <0 0 0 0 16 8 4>;
+			};
+		};
 	};
 };

-- 
2.43.0

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ