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Message-Id: <175250104197.2052778.9197055030236211122.robh@kernel.org> Date: Mon, 14 Jul 2025 10:24:32 -0500 From: "Rob Herring (Arm)" <robh@...nel.org> To: Ziyue Zhang <ziyue.zhang@....qualcomm.com> Cc: jingoohan1@...il.com, Ziyue Zhang <quic_ziyuzhan@...cinc.com>, quic_vbadigan@...cinc.com, abel.vesa@...aro.org, linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org, kw@...ux.com, konradybcio@...nel.org, kwilczynski@...nel.org, linux-pci@...r.kernel.org, andersson@...nel.org, krzk+dt@...nel.org, kishon@...nel.org, linux-phy@...ts.infradead.org, johan+linaro@...nel.org, bhelgaas@...gle.com, quic_krichai@...cinc.com, devicetree@...r.kernel.org, lpieralisi@...nel.org, mani@...nel.org, vkoul@...nel.org, qiang.yu@....qualcomm.com, neil.armstrong@...aro.org, conor+dt@...nel.org Subject: Re: [PATCH v8 0/5] pci: qcom: Add QCS8300 PCIe support On Mon, 14 Jul 2025 16:15:24 +0800, Ziyue Zhang wrote: > This series depend on the sa8775p gcc_aux_clock and link_down reset change > https://lore.kernel.org/all/20250529035416.4159963-1-quic_ziyuzhan@quicinc.com/ > > This series adds document, phy, configs support for PCIe in QCS8300. > It also adds 'link_down' reset for sa8775p. > > Have follwing changes: > - Add dedicated schema for the PCIe controllers found on QCS8300. > - Add compatible for qcs8300 platform. > - Add configurations in devicetree for PCIe0, including registers, clocks, interrupts and phy setting sequence. > - Add configurations in devicetree for PCIe1, including registers, clocks, interrupts and phy setting sequence. > > Signed-off-by: Krishna chaitanya chundru <quic_krichai@...cinc.com> > Signed-off-by: Ziyue Zhang <quic_ziyuzhan@...cinc.com> > --- > Changes in v8: > - rebase sc8280xp-qmp-pcie-phy change to solve conflicts. > - Add Fixes tag to phy change (Johan) > - Link to v7: https://lore.kernel.org/all/20250625092539.762075-1-quic_ziyuzhan@quicinc.com/ > > Changes in v7: > - rebase qcs8300-ride.dtsi change to solve conflicts. > - Link to v6: https://lore.kernel.org/all/20250529035635.4162149-1-quic_ziyuzhan@quicinc.com/ > > Changes in v6: > - move the qcs8300 and sa8775p phy compatibility entry into the list of PHYs that require six clocks > - Update QCS8300 and sa8775p phy dt, remove aux clock. > - Fixed compile error found by kernel test robot > - Link to v5: https://lore.kernel.org/all/20250507031019.4080541-1-quic_ziyuzhan@quicinc.com/ > > Changes in v5: > - Add QCOM PCIe controller version in commit msg (Mani) > - Modify platform dts change subject (Dmitry) > - Fixed compile error found by kernel test robot > - Link to v4: https://lore.kernel.org/linux-phy/20241220055239.2744024-1-quic_ziyuzhan@quicinc.com/ > > Changes in v4: > - Add received tag > - Fixed compile error found by kernel test robot > - Link to v3: https://lore.kernel.org/lkml/202412211301.bQO6vXpo-lkp@intel.com/T/#mdd63e5be39acbf879218aef91c87b12d4540e0f7 > > Changes in v3: > - Add received tag(Rob & Dmitry) > - Update pcie_phy in gcc node to soc dtsi(Dmitry & Konrad) > - remove pcieprot0 node(Konrad & Mani) > - Fix format comments(Konrad) > - Update base-commit to tag: next-20241213(Bjorn) > - Corrected of_device_id.data from 1.9.0 to 1.34.0. > - Link to v2: https://lore.kernel.org/all/20241128081056.1361739-1-quic_ziyuzhan@quicinc.com/ > > Changes in v2: > - Fix some format comments and match the style in x1e80100(Konrad) > - Add global interrupt for PCIe0 and PCIe1(Konrad) > - split the soc dtsi and the platform dts into two changes(Konrad) > - Link to v1: https://lore.kernel.org/all/20241114095409.2682558-1-quic_ziyuzhan@quicinc.com/ > > > > Ziyue Zhang (5): > dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings > for qcs8300 > arm64: dts: qcom: qcs8300: enable pcie0 > arm64: dts: qcom: qcs8300-ride: enable pcie0 interface > arm64: dts: qcom: qcs8300: enable pcie1 > arm64: dts: qcom: qcs8300-ride: enable pcie1 interface > > .../phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 2 +- > arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 80 +++++ > arch/arm64/boot/dts/qcom/qcs8300.dtsi | 296 +++++++++++++++++- > 3 files changed, 375 insertions(+), 3 deletions(-) > > > base-commit: b551c4e2a98a177a06148cf16505643cd2108386 > -- > 2.34.1 > > > My bot found new DTB warnings on the .dts files added or changed in this series. Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings are fixed by another series. Ultimately, it is up to the platform maintainer whether these warnings are acceptable or not. No need to reply unless the platform maintainer has comments. If you already ran DT checks and didn't see these error(s), then make sure dt-schema is up to date: pip3 install dtschema --upgrade This patch series was applied (using b4) to base: Base: using specified base-commit b551c4e2a98a177a06148cf16505643cd2108386 If this is not the correct base, please add 'base-commit' tag (or use b4 which does this automatically) New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/qcom/' for 20250714081529.3847385-1-ziyue.zhang@....qualcomm.com: arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: pci@...0000 (qcom,pcie-qcs8300): reset-names: ['pci', 'link_down'] is too long from schema $id: http://devicetree.org/schemas/pci/qcom,pcie-sa8775p.yaml# arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: pci@...0000 (qcom,pcie-qcs8300): resets: [[50, 1], [50, 2]] is too long from schema $id: http://devicetree.org/schemas/pci/qcom,pcie-sa8775p.yaml# arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: pci@...0000 (qcom,pcie-qcs8300): reset-names: ['pci', 'link_down'] is too long from schema $id: http://devicetree.org/schemas/pci/qcom,pcie-sa8775p.yaml# arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: pci@...0000 (qcom,pcie-qcs8300): resets: [[50, 6], [50, 7]] is too long from schema $id: http://devicetree.org/schemas/pci/qcom,pcie-sa8775p.yaml# arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: phy@...4000 (qcom,sa8775p-qmp-gen4x4-pcie-phy): clock-names: ['aux', 'cfg_ahb', 'ref', 'rchng', 'pipe', 'pipediv2'] is too short from schema $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-pcie-phy.yaml# arch/arm64/boot/dts/qcom/qcs8300-ride.dtb: phy@...4000 (qcom,sa8775p-qmp-gen4x4-pcie-phy): clocks: [[50, 70], [50, 68], [50, 80], [50, 72], [50, 74], [50, 77]] is too short from schema $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-pcie-phy.yaml#
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