linux-kernel - Re: [PATCH v3] RISC-V: KVM: Delegate illegal instruction fault to VS mode

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Message-ID: <CAAhSdy0OumSXbJEEafE6q-LPu2PTdN9Tzx_aoapy=RJD214uBw@mail.gmail.com>
Date: Mon, 14 Jul 2025 13:33:59 +0530
From: Anup Patel <anup@...infault.org>
To: Xu Lu <luxu.kernel@...edance.com>
Cc: rkrcmar@...tanamicro.com, cleger@...osinc.com, atish.patra@...ux.dev, 
	paul.walmsley@...ive.com, palmer@...belt.com, aou@...s.berkeley.edu, 
	alex@...ti.fr, kvm@...r.kernel.org, kvm-riscv@...ts.infradead.org, 
	linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3] RISC-V: KVM: Delegate illegal instruction fault to VS mode

On Fri, Jul 11, 2025 at 3:45 PM Xu Lu <luxu.kernel@...edance.com> wrote:
>
> Delegate illegal instruction fault to VS mode in default to avoid such

s/in default/by default/

> exceptions being trapped to HS and redirected back to VS.
>
> The delegation of illegal instruction fault is particularly important
> to guest applications that use vector instructions frequently. In such
> cases, an illegal instruction fault will be raised when guest user thread
> uses vector instruction the first time and then guest kernel will enable
> user thread to execute following vector instructions.
>
> The fw pmu event counter remains undeleted so that guest can still query
> illegal instruction events via sbi call. Guest will only see zero count
> on illegal instruction faults and know 'firmware' has delegated it.
>
> Signed-off-by: Xu Lu <luxu.kernel@...edance.com>
> ---
>  arch/riscv/include/asm/kvm_host.h | 1 +
>  arch/riscv/kvm/vcpu_exit.c        | 5 -----
>  2 files changed, 1 insertion(+), 5 deletions(-)
>
> diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h
> index 85cfebc32e4cf..3f6b9270f366a 100644
> --- a/arch/riscv/include/asm/kvm_host.h
> +++ b/arch/riscv/include/asm/kvm_host.h
> @@ -44,6 +44,7 @@
>  #define KVM_REQ_STEAL_UPDATE           KVM_ARCH_REQ(6)
>
>  #define KVM_HEDELEG_DEFAULT            (BIT(EXC_INST_MISALIGNED) | \
> +                                        BIT(EXC_INST_ILLEGAL)     | \
>                                          BIT(EXC_BREAKPOINT)      | \
>                                          BIT(EXC_SYSCALL)         | \
>                                          BIT(EXC_INST_PAGE_FAULT) | \
> diff --git a/arch/riscv/kvm/vcpu_exit.c b/arch/riscv/kvm/vcpu_exit.c
> index 6e0c184127956..cd8fa68f3642c 100644
> --- a/arch/riscv/kvm/vcpu_exit.c
> +++ b/arch/riscv/kvm/vcpu_exit.c
> @@ -193,11 +193,6 @@ int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
>         ret = -EFAULT;
>         run->exit_reason = KVM_EXIT_UNKNOWN;
>         switch (trap->scause) {
> -       case EXC_INST_ILLEGAL:
> -               kvm_riscv_vcpu_pmu_incr_fw(vcpu, SBI_PMU_FW_ILLEGAL_INSN);
> -               vcpu->stat.instr_illegal_exits++;
> -               ret = vcpu_redirect(vcpu, trap);
> -               break;

Lets keep the illegal instruction trap handling so that if SBI implementation
forwards VS-mode illegal instruction trap to HS-mode ignoring hedeleg
due to unknown reasons then we still forward this trap to Guest otherwise
such an illegal instruction trap will cause exit to user-space and eventually
kill the Guest.

>         case EXC_LOAD_MISALIGNED:
>                 kvm_riscv_vcpu_pmu_incr_fw(vcpu, SBI_PMU_FW_MISALIGNED_LOAD);
>                 vcpu->stat.load_misaligned_exits++;
> --
> 2.20.1
>

Regards,
Anup