linux-kernel - Re: [PATCH v3] x86/boot: Avoid writing to cr4 twice in startup

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Message-ID: <927f2b0a-7e64-40f2-9773-cba9b1d328a5@citrix.com>
Date: Tue, 15 Jul 2025 22:21:20 +0100
From: Andrew Cooper <andrew.cooper3@...rix.com>
To: khaliidcaliy@...il.com
Cc: ardb@...nel.org, bp@...en8.de, brgerst@...il.com,
 dave.hansen@...ux.intel.com, hpa@...or.com, linux-kernel@...r.kernel.org,
 mingo@...hat.com, tglx@...utronix.de, ubizjak@...il.com, x86@...nel.org
Subject: Re: [PATCH v3] x86/boot: Avoid writing to cr4 twice in startup_64()

> diff
> <https://lore.kernel.org/lkml/20250715181709.1040-1-khaliidcaliy@gmail.com/#iZ31arch:x86:kernel:head_64.S>
> --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index
> 4390a28f7dad..dfb5390e5c9a 100644 --- a/arch/x86/kernel/head_64.S +++
> b/arch/x86/kernel/head_64.S @@ -222,12 +222,9 @@
> SYM_INNER_LABEL(common_startup_64, SYM_L_LOCAL)  
>  	/* Even if ignored in long mode, set PSE uniformly on all logical CPUs. */
>  	btsl	$X86_CR4_PSE_BIT, %ecx
> - movq %rcx, %cr4 - - /* - * Set CR4.PGE to re-enable global
> translations. - */ + /* Set CR4.PGE to re-enable global translations. */  	btsl	$X86_CR4_PGE_BIT, %ecx
> +  	movq	%rcx, %cr4

The comments are at best misleading, but you've broken the TLB flush
being performed which depends on the double write.

This logic is intentionally performing a write with CR4.PGE=0 followed
by one with CR4.PGE=1 to flush all global mappings.

~Andrew