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Message-ID: <7fcede81-902c-4eaf-82be-cfaf3154bce9@intel.com>
Date: Thu, 17 Jul 2025 13:25:57 -0700
From: Sohil Mehta <sohil.mehta@...el.com>
To: Andrew Cooper <andrew.cooper3@...rix.com>
CC: Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>,
Borislav Petkov <bp@...en8.de>, Dave Hansen <dave.hansen@...ux.intel.com>,
<x86@...nel.org>, "H. Peter Anvin" <hpa@...or.com>, Peter Zijlstra
<peterz@...radead.org>, Yuntao Wang <yuntao.wang@...ux.dev>, Zhang Rui
<rui.zhang@...el.com>, LKML <linux-kernel@...r.kernel.org>
Subject: Re: x86/apic: Drop useless CXL/CPX row from the TSC deadline errata
table
On 7/16/2025 9:08 AM, Andrew Cooper wrote:
> A microcode revision of 0 is guaranteed to exit apic_validate_deadline_timer()
> early, but a better way is with no row at all.
>
Yeah, not having an entry is much better. "exit" can be a bit ambiguous.
Should we be slightly more precise?
A microcode revision of 0 is guaranteed to return true for
apic_validate_deadline_timer(), but a better way is with no row at all.
> No functional change.
>
> Signed-off-by: Andrew Cooper <andrew.cooper3@...rix.com>
> ---
Reviewed-by: Sohil Mehta <sohil.mehta@...el.com>
> CC: Thomas Gleixner <tglx@...utronix.de>
> CC: Ingo Molnar <mingo@...hat.com>
> CC: Borislav Petkov <bp@...en8.de>
> CC: Dave Hansen <dave.hansen@...ux.intel.com>
> CC: x86@...nel.org
> CC: "H. Peter Anvin" <hpa@...or.com>
> CC: Peter Zijlstra <peterz@...radead.org>
> CC: Sohil Mehta <sohil.mehta@...el.com>
> CC: Yuntao Wang <yuntao.wang@...ux.dev>
> CC: Zhang Rui <rui.zhang@...el.com>
> CC: linux-kernel@...r.kernel.org
>
> Strictly speaking, this is:
>
> Fixes: 66abf2388331 ("x86/apic: Convert the TSC deadline timer matching to steppings macro")
>
> but I really don't think it's interesting to backport.
>
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