linux-kernel - Re: [PATCH 2/2] pinctrl: qcom: Add glymur pinctrl driver

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Message-ID: <e69e6128-3f50-4bd3-89bb-09d7b237a568@oss.qualcomm.com>
Date: Thu, 17 Jul 2025 13:52:26 +0200
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Pankaj Patil <pankaj.patil@....qualcomm.com>, andersson@...nel.org,
        linus.walleij@...aro.org, robh@...nel.org, krzk+dt@...nel.org,
        conor+dt@...nel.org, quic_rjendra@...cinc.com
Cc: linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] pinctrl: qcom: Add glymur pinctrl driver

On 7/16/25 5:08 PM, Pankaj Patil wrote:
> Add TLMM pinctrl driver to support pin configuration with pinctrl
> framework for Glymur SoC.
> 
> Signed-off-by: Pankaj Patil <pankaj.patil@....qualcomm.com>
> ---

[...]

> +	[249] = PINGROUP(249, pmc_oca_n, _, _, _, _, _, _, _, _, _, _),
> +	[250] = UFS_RESET(ufs_reset, 0x104004),

You'll need to borrow the #define from 8750 pinctrl

and then:

UFS_RESET(ufs_reset, 0x104004, 0x105000),

> +	[251] = SDC_QDSD_PINGROUP(sdc2_clk, 0xff000, 14, 6),
> +	[252] = SDC_QDSD_PINGROUP(sdc2_cmd, 0xff000, 11, 3),
> +	[253] = SDC_QDSD_PINGROUP(sdc2_data, 0xff000, 9, 0),
> +};
> +

[...]

> +static const struct msm_pinctrl_soc_data glymur_tlmm = {
> +	.pins = glymur_pins,
> +	.npins = ARRAY_SIZE(glymur_pins),
> +	.functions = glymur_functions,
> +	.nfunctions = ARRAY_SIZE(glymur_functions),
> +	.groups = glymur_groups,
> +	.ngroups = ARRAY_SIZE(glymur_groups),
> +	.ngpios = 250,

251 (0..=250, incl. ufs reset)

Konrad