linux-kernel - Re: [RFC] SCTLR_EL1.TIDCP toggling for performance

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Message-ID: <aHqamaqueuk18NyS@arm.com>
Date: Fri, 18 Jul 2025 20:03:53 +0100
From: Catalin Marinas <catalin.marinas@....com>
To: "Liao, Chang" <liaochang1@...wei.com>
Cc: kristina.martsenko@....com, will@...nel.org, mark.rutland@....com,
	sashal@...nel.org, yangjiangshui@...artners.com,
	zouyipeng@...wei.com, justin.he@....com, zengheng4@...wei.com,
	yangyicong@...ilicon.com, ruanjinjie <ruanjinjie@...wei.com>,
	inux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [RFC] SCTLR_EL1.TIDCP toggling for performance

On Fri, Jul 18, 2025 at 10:32:00AM +0800, Liao, Chang wrote:
> I've reviewed your patch [1] for FEAT_TIDCP1 support, which by default traps EL0
> accesses to implementation-defined system registers and instructions at EL1/EL2.
> 
> Do you have any plans to add support for toggling the SCTLR_EL1.TIDCP1 bit? I'm
> encountering performance degradation on CPU where certain implementation-defined
> registers and instructions are designed for EL0 performance use. The trapping
> overhead is substantial enough to compromise any benefits, and it's even worse
> in virtualization. Therefore, I'm hoping there's a way to clear the SCTLR_EL1.TIDCP1
> bit on such platforms, perhaps via a kernel config option or command-line parameter.
> Alternatively, do you have a better solution for gracefully toggling this bit on
> and off?

Given that we don't know what imp def functionality is available, what
side-effects it has, we should not allow user-space to toggle such bit,
nor allow the user access to those registers.

System-wide, passing id_aa64mmfr1.tidcp1=0 on the kernel command line
may work.

-- 
Catalin