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Message-ID: <c6dca956-d0ea-4c63-a48f-d02f21d38b9d@linuxfoundation.org>
Date: Fri, 18 Jul 2025 15:10:32 -0600
From: Shuah Khan <skhan@...uxfoundation.org>
To: Shuai Xue <xueshuai@...ux.alibaba.com>, brauner@...nel.org,
 shuah@...nel.org, will@...nel.org, linux-kernel@...r.kernel.org,
 linux-kselftest@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Cc: baolin.wang@...ux.alibaba.com, tianruidong@...ux.alibaba.com,
 catalin.marinas@....com, mark.rutland@....com,
 Shuah Khan <skhan@...uxfoundation.org>
Subject: Re: [RESEND PATCH] selftests/pidfd: align stack to fix SP alignment
 exception

On 7/16/25 01:00, Shuai Xue wrote:
> 
> 
> 在 2025/6/19 10:26, Shuai Xue 写道:
>>
>>
>> 在 2025/6/19 05:36, Shuah Khan 写道:
>>> On 6/15/25 23:06, Shuai Xue wrote:
>>>> The pidfd_test fails on the ARM64 platform with the following error:
>>>>
>>>>      Bail out! pidfd_poll check for premature notification on child thread exec test: Failed
>>>>
>>>> When exception-trace is enabled, the kernel logs the details:
>>>>
>>>>      #echo 1 > /proc/sys/debug/exception-trace
>>>>      #dmesg | tail -n 20
>>>>      [48628.713023] pidfd_test[1082142]: unhandled exception: SP Alignment, ESR 0x000000009a000000, SP/PC alignment exception in pidfd_test[400000+4000]
>>>>      [48628.713049] CPU: 21 PID: 1082142 Comm: pidfd_test Kdump: loaded Tainted: G        W   E      6.6.71-3_rc1.al8.aarch64 #1
>>>>      [48628.713051] Hardware name: AlibabaCloud AliServer-Xuanwu2.0AM-1UC1P-5B/AS1111MG1, BIOS 1.2.M1.AL.P.157.00 07/29/2023
>>>>      [48628.713053] pstate: 60001800 (nZCv daif -PAN -UAO -TCO -DIT +SSBS BTYPE=-c)
>>>>      [48628.713055] pc : 0000000000402100
>>>>      [48628.713056] lr : 0000ffff98288f9c
>>>>      [48628.713056] sp : 0000ffffde49daa8
>>>>      [48628.713057] x29: 0000000000000000 x28: 0000000000000000 x27: 0000000000000000
>>>>      [48628.713060] x26: 0000000000000000 x25: 0000000000000000 x24: 0000000000000000
>>>>      [48628.713062] x23: 0000000000000000 x22: 0000000000000000 x21: 0000000000400e80
>>>>      [48628.713065] x20: 0000000000000000 x19: 0000000000402650 x18: 0000000000000000
>>>>      [48628.713067] x17: 00000000004200d8 x16: 0000ffff98288f40 x15: 0000ffffde49b92c
>>>>      [48628.713070] x14: 0000000000000000 x13: 0000000000000000 x12: 0000000000000000
>>>>      [48628.713072] x11: 0000000000001011 x10: 0000000000402100 x9 : 0000000000000010
>>>>      [48628.713074] x8 : 00000000000000dc x7 : 3861616239346564 x6 : 000000000000000a
>>>>      [48628.713077] x5 : 0000ffffde49daa8 x4 : 000000000000000a x3 : 0000ffffde49daa8
>>>>      [48628.713079] x2 : 0000ffffde49dadc x1 : 0000ffffde49daa8 x0 : 0000000000000000
>>>>
>>>> According to ARM ARM D1.3.10.2 SP alignment checking:
>>>>
>>>>> When the SP is used as the base address of a calculation, regardless of
>>>>> any offset applied by the instruction, if bits [3:0] of the SP are not
>>>>> 0b0000, there is a misaligned SP.
>>>>
>>>> To fix it, align the stack with 16 bytes.
>>>>
>>>> Signed-off-by: Shuai Xue <xueshuai@...ux.alibaba.com>
>>>> ---
>>>
>>> Assuming this is going through Christian's tree.
>>>
>>> Acked-by: Shuah Khan <skhan@...uxfoundation.org>
>>>
>>> Let me know if you would like me to pick it up.
>>>
>>> thanks,
>>> -- Shuah
>>
>> Hi, Shuah
>>
>> Thanks for your review.
>>
>> I send this fix in Mar, but it missed last linux version.
>> I think I need your help to pick it up.
>>
>> Thanks.
>> Shuai
>>
> 
> Hi, Shuah,
> 
> Gentle ping,
> 
> Thanks.
> Shuai
> 

Will, Christian,

Can you take a look at this and let me know if this change looks
good to you both.

I can take this through my tree after your reviews.

thanks,
-- Shuah

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