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Message-ID: <jvh5743te7yjfgtp2fbsiksneubcqgdawafisaoefwbswxinzk@4luwzkadt2oo>
Date: Sat, 19 Jul 2025 23:09:22 -0500
From: Bjorn Andersson <andersson@...nel.org>
To: Pankaj Patil <pankaj.patil@....qualcomm.com>
Cc: linus.walleij@...aro.org, robh@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, quic_rjendra@...cinc.com, linux-arm-msm@...r.kernel.org,
linux-gpio@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] pinctrl: qcom: Add glymur pinctrl driver
On Wed, Jul 16, 2025 at 08:38:22PM +0530, Pankaj Patil wrote:
[..]
> diff --git a/drivers/pinctrl/qcom/pinctrl-glymur.c b/drivers/pinctrl/qcom/pinctrl-glymur.c
> +
> +/* Every pin is maintained as a single group, and missing or non-existing pin
> + * would be maintained as dummy group to synchronize pin group index with
> + * pin descriptor registered with pinctrl core.
> + * Clients would not be able to request these dummy pin groups.
> + */
As Abel commented on the format of this comment I actually read it and
realized that it has changed since last time I read it...
This now describes how dummy entries needs to be used in order to fill
out the array if there are gaps. So far this comment only applies to
SDM670. I see no dummy entries in your table, so what is it
documenting?!
Please remove it.
> +static const struct msm_pingroup glymur_groups[] = {
Regards,
Bjorn
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