linux-kernel - Re: [PATCH 2/2] pinctrl: qcom: Add glymur pinctrl driver

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Message-ID: <a2be3ff9-d364-4a6e-a8e2-e0391e979b11@oss.qualcomm.com>
Date: Fri, 18 Jul 2025 19:32:36 +0530
From: Pankaj Patil <pankaj.patil@....qualcomm.com>
To: Krzysztof Kozlowski <krzk@...nel.org>,
        Konrad Dybcio <konrad.dybcio@....qualcomm.com>, andersson@...nel.org,
        linus.walleij@...aro.org, robh@...nel.org, krzk+dt@...nel.org,
        conor+dt@...nel.org, quic_rjendra@...cinc.com
Cc: linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] pinctrl: qcom: Add glymur pinctrl driver

On 7/17/2025 8:09 PM, Krzysztof Kozlowski wrote:
> On 17/07/2025 13:52, Konrad Dybcio wrote:
>>> +static const struct msm_pinctrl_soc_data glymur_tlmm = {
>>> +	.pins = glymur_pins,
>>> +	.npins = ARRAY_SIZE(glymur_pins),
>>> +	.functions = glymur_functions,
>>> +	.nfunctions = ARRAY_SIZE(glymur_functions),
>>> +	.groups = glymur_groups,
>>> +	.ngroups = ARRAY_SIZE(glymur_groups),
>>> +	.ngpios = 250,
>> 251 (0..=250, incl. ufs reset)
>
> The binding said 238 GPIOs...
>
>> Konrad
>
> Best regards,
> Krzysztof
Will correct the bindings along with the driver fixes in v2.