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Message-ID:
 <SEYPR06MB5134F7C1CEA391249D0E1AB79D5CA@SEYPR06MB5134.apcprd06.prod.outlook.com>
Date: Tue, 22 Jul 2025 05:29:03 +0000
From: Jacky Chou <jacky_chou@...eedtech.com>
To: Krzysztof Kozlowski <krzk@...nel.org>
CC: "bhelgaas@...gle.com" <bhelgaas@...gle.com>, "lpieralisi@...nel.org"
	<lpieralisi@...nel.org>, "kwilczynski@...nel.org" <kwilczynski@...nel.org>,
	"mani@...nel.org" <mani@...nel.org>, "robh@...nel.org" <robh@...nel.org>,
	"krzk+dt@...nel.org" <krzk+dt@...nel.org>, "conor+dt@...nel.org"
	<conor+dt@...nel.org>, "joel@....id.au" <joel@....id.au>,
	"andrew@...econstruct.com.au" <andrew@...econstruct.com.au>,
	"linux-aspeed@...ts.ozlabs.org" <linux-aspeed@...ts.ozlabs.org>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "openbmc@...ts.ozlabs.org"
	<openbmc@...ts.ozlabs.org>, "linux-gpio@...r.kernel.org"
	<linux-gpio@...r.kernel.org>, "linus.walleij@...aro.org"
	<linus.walleij@...aro.org>, "p.zabel@...gutronix.de"
	<p.zabel@...gutronix.de>, BMC-SW <BMC-SW@...eedtech.com>
Subject: [PATCH v2 03/10] dt-bindings: PCI: Add ASPEED PCIe RC support

> >>> +patternProperties:
> >>> +  "^pcie@[0-9a-f,]+$":
> >>
> >> Why do you need it? Also, order things according to example schema.
> >>
> >
> > Thanks for your question.
> >
> > In the v1 discussion, another reviewer suggested that we should
> > support a multi-port structure for the PCIe root complex, where each
> > port is represented as a child node (e.g., pcie@...).
> > That's why patternProperties was added here — to explicitly allow such
> > subnodes and validate them properly.
> 
> And schema does not allow it already?
> 

Agreed,
I will remove it in next version.

Thanks,
Jacky

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