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Message-ID: <2563a389-4e7c-4536-b956-476f98e24b37@lunn.ch>
Date: Tue, 22 Jul 2025 15:40:16 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Gatien CHEVALLIER <gatien.chevallier@...s.st.com>
Cc: Krzysztof Kozlowski <krzk@...nel.org>,
	Andrew Lunn <andrew+netdev@...n.ch>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Maxime Coquelin <mcoquelin.stm32@...il.com>,
	Alexandre Torgue <alexandre.torgue@...s.st.com>,
	Christophe Roullier <christophe.roullier@...s.st.com>,
	Heiner Kallweit <hkallweit1@...il.com>,
	Russell King <linux@...linux.org.uk>,
	Simon Horman <horms@...nel.org>,
	Tristram Ha <Tristram.Ha@...rochip.com>,
	Florian Fainelli <florian.fainelli@...adcom.com>,
	netdev@...r.kernel.org, devicetree@...r.kernel.org,
	linux-stm32@...md-mailman.stormreply.com,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH net-next 1/4] dt-bindings: net: document st,phy-wol
 property

I know Russell has also replied about issues with stmmac. Please
consider that when reading what i say... It might be not applicable.

> Seems like a fair and logical approach. It seems reasonable that the
> MAC driver relies on the get_wol() API to know what's supported.
> 
> The tricky thing for the PHY used in this patchset is to get this
> information:
> 
> Extract from the documentation of the LAN8742A PHY:
> "The WoL detection can be configured to assert the nINT interrupt pin
> or nPME pin"

https://www.kernel.org/doc/Documentation/devicetree/bindings/power/wakeup-source.txt

It is a bit messy, but in the device tree, you could have:

    interrupts = <&sirq 0 IRQ_TYPE_LEVEL_LOW>
                 <&pmic 42 IRQ_TYPE_LEVEL_LOW>;
    interrupt-names = "nINT", "wake";
    wakeup-source

You could also have:

    interrupts = <&sirq 0 IRQ_TYPE_LEVEL_LOW>;
    interrupt-names = "wake";
    wakeup-source

In the first example, since there are two interrupts listed, it must
be using the nPME. For the second, since there is only one, it must be
using nINT.

Where this does not work so well is when you have a board which does
not have nINT wired, but does have nPME. The phylib core will see
there is an interrupt and request it, and disable polling. And then
nothing will work. We might be able to delay solving that until such a
board actually exists?

	Andrew

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