linux-kernel - Re: [External] [PATCH] RISC-V: Implement ioremap

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Message-ID: <CAEEQ3wmVPrZ6s8msM8RgcyZePGhXM1ikYMc5wW2n8q3Bf90EVw@mail.gmail.com>
Date: Tue, 22 Jul 2025 11:00:37 +0800
From: yunhui cui <cuiyunhui@...edance.com>
To: Qingfang Deng <dqfext@...il.com>
Cc: Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>, 
	Albert Ou <aou@...s.berkeley.edu>, Samuel Holland <samuel.holland@...ive.com>, 
	Qingfang Deng <qingfang.deng@...lower.com.cn>, Eric Chan <ericchancf@...gle.com>, 
	Andrea Parri <parri.andrea@...il.com>, linux-riscv@...ts.infradead.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [External] [PATCH] RISC-V: Implement ioremap_wc/wt

Hi Qingfang,

On Thu, Jun 6, 2024 at 2:48 PM yunhui cui <cuiyunhui@...edance.com> wrote:
>
>  Hi Qingfang,
>
>
> On Fri, May 31, 2024 at 6:04 PM Qingfang Deng <dqfext@...il.com> wrote:
> >
> > From: Qingfang Deng <qingfang.deng@...lower.com.cn>
> >
> > Currently on RISC-V, ioremap_wc/wt uses the default ioremap
> > implementation, which maps the memory as strongly-ordered non-cacheable
> > IO memory on systems with Svpbmt.
> >
> > To improve performance, map the memory as weakly-ordered non-cacheable
> > normal memory.
> >
> > Signed-off-by: Qingfang Deng <qingfang.deng@...lower.com.cn>
> > ---
> >  arch/riscv/include/asm/io.h | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> >
> > diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h
> > index 1c5c641075d2..582503e0f508 100644
> > --- a/arch/riscv/include/asm/io.h
> > +++ b/arch/riscv/include/asm/io.h
> > @@ -133,6 +133,14 @@ __io_writes_outs(outs, u64, q, __io_pbr(), __io_paw())
> >  #define outsq(addr, buffer, count) __outsq(PCI_IOBASE + (addr), buffer, count)
> >  #endif
> >
> > +#ifdef CONFIG_MMU
> > +#define ioremap_wc(addr, size) \
> > +       ioremap_prot((addr), (size), \
> > +                    (_PAGE_KERNEL & ~_PAGE_MTMASK) | _PAGE_NOCACHE)

Compared with IO attributes, NC attributes can improve performance,
specifically in these aspects: Relaxed Order, Gathering, Supports Read
Speculation, Supports Unaligned Access. Therefore, it is necessary to
implement ioremap_wc().

> > +
> > +#define ioremap_wt ioremap_wc

>From the perspective of arm64, ioremap_wt should have IO attributes
rather than NC attributes, so this line should be removed.

> > +#endif
> > +
> >  #include <asm-generic/io.h>
> >
> >  #ifdef CONFIG_MMU
> > --
> > 2.34.1
> >
> >
>
> Can you provide specific test data for performance improvement?
>
> Thanks,
> Yunhui

Thanks,
Yunhui