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Message-ID: <268811ba-03c5-4957-b073-1dfbad77747b@linaro.org>
Date: Wed, 23 Jul 2025 17:36:14 +0200
From: neil.armstrong@...aro.org
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Subject: Re: [PATCH v2 14/15] arm64: dts: qcom: Add initial Milos dtsi
Hi,
<snip>
>
>> + pmu-a520 {
>> + compatible = "arm,cortex-a520-pmu";
>> + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
>> + };
>> +
>> + pmu-a720 {
>> + compatible = "arm,cortex-a720-pmu";
>> + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
>> + };
>
> See:
>
> 9ce52e908bd5 ("arm64: dts: qcom: sm8650: switch to interrupt-cells 4 to add PPI partitions")
> 2c06e0797c32 ("arm64: dts: qcom: sm8650: add PPI interrupt partitions for the ARM PMUs")
>
Yeah switch to 4 cells now, so you can properly route the PMU PPI interrupt to the right core.
New SoCs DTs should have 4 interrupts-cells from now, I'll migrate sm8550 shortly.
Neil
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