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Message-ID: <20250723085654.2273324-4-jonas@kwiboo.se>
Date: Wed, 23 Jul 2025 08:56:45 +0000
From: Jonas Karlman <jonas@...boo.se>
To: Heiko Stuebner <heiko@...ech.de>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Jonathan Cameron <jic23@...nel.org>,
David Lechner <dlechner@...libre.com>,
Nuno Sá <nuno.sa@...log.com>,
Andy Shevchenko <andy@...nel.org>
Cc: Yao Zi <ziyao@...root.org>,
Chukun Pan <amadeus@....edu.cn>,
devicetree@...r.kernel.org,
linux-rockchip@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
Jonas Karlman <jonas@...boo.se>,
linux-iio@...r.kernel.org
Subject: [PATCH v2 3/5] dt-bindings: iio: adc: rockchip-saradc: Allow use of a power-domain
The SARADC controller in most Rockchip SoCs are part of power domains
that are always powered on, i.e. PD_BUS or PD_PERI. These always powered
on power domains have typically not been described in the device tree.
Because these power domains have been left out of the device tree there
has not been any real need to properly describe the power domain of the
SARADC controller.
On RK3528 the SARADC controller is part of the PD_VPU power domain.
Add support to describe an optional power-domains for the SARADC
controller in Rockchip SoCs.
Signed-off-by: Jonas Karlman <jonas@...boo.se>
---
v2: Update commit message
---
Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml
index 41e0c56ef8e3..f776041fd08f 100644
--- a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml
@@ -47,6 +47,9 @@ properties:
- const: saradc
- const: apb_pclk
+ power-domains:
+ maxItems: 1
+
resets:
maxItems: 1
--
2.50.1
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