linux-kernel - [PATCH 03/11] riscv: indirect jmp in asm that's static in nature to use sw guarded jump

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Message-Id: <20250724-riscv_kcfi-v1-3-04b8fa44c98c@rivosinc.com>
Date: Thu, 24 Jul 2025 16:36:56 -0700
From: Deepak Gupta <debug@...osinc.com>
To: Paul Walmsley <paul.walmsley@...ive.com>, 
 Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>, 
 Alexandre Ghiti <alex@...ti.fr>, Masahiro Yamada <masahiroy@...nel.org>, 
 Nathan Chancellor <nathan@...nel.org>, 
 Nicolas Schier <nicolas.schier@...ux.dev>, 
 Andrew Morton <akpm@...ux-foundation.org>, 
 David Hildenbrand <david@...hat.com>, 
 Lorenzo Stoakes <lorenzo.stoakes@...cle.com>, 
 "Liam R. Howlett" <Liam.Howlett@...cle.com>, 
 Vlastimil Babka <vbabka@...e.cz>, Mike Rapoport <rppt@...nel.org>, 
 Suren Baghdasaryan <surenb@...gle.com>, Michal Hocko <mhocko@...e.com>, 
 Nick Desaulniers <nick.desaulniers+lkml@...il.com>, 
 Bill Wendling <morbo@...gle.com>, Monk Chiang <monk.chiang@...ive.com>, 
 Kito Cheng <kito.cheng@...ive.com>, Justin Stitt <justinstitt@...gle.com>
Cc: linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org, 
 linux-kbuild@...r.kernel.org, linux-mm@...ck.org, llvm@...ts.linux.dev, 
 rick.p.edgecombe@...el.com, broonie@...nel.org, cleger@...osinc.com, 
 samitolvanen@...gle.com, apatel@...tanamicro.com, ajones@...tanamicro.com, 
 conor.dooley@...rochip.com, charlie@...osinc.com, samuel.holland@...ive.com, 
 bjorn@...osinc.com, fweimer@...hat.com, jeffreyalaw@...il.com, 
 heinrich.schuchardt@...onical.com, andrew@...ive.com, ved@...osinc.com, 
 Deepak Gupta <debug@...osinc.com>
Subject: [PATCH 03/11] riscv: indirect jmp in asm that's static in nature
 to use sw guarded jump

Handwritten `__memset` asm routine perform static jumps within
function and uses `a5` to do that. This would require a landing pad
instruction at the target. Since its static jump and no memory load is
involved, use `t2` instead which is exempt from requiring a landing pad.

Signed-off-by: Deepak Gupta <debug@...osinc.com>
---
 arch/riscv/lib/memset.S | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/riscv/lib/memset.S b/arch/riscv/lib/memset.S
index da23b8347e2d..c4a318d8eef3 100644
--- a/arch/riscv/lib/memset.S
+++ b/arch/riscv/lib/memset.S
@@ -56,12 +56,12 @@ SYM_FUNC_START(__memset)

 	/* Jump into loop body */
 	/* Assumes 32-bit instruction lengths */
-	la a5, 3f
+	la t2, 3f
 #ifdef CONFIG_64BIT
 	srli a4, a4, 1
 #endif
-	add a5, a5, a4
-	jr a5
+	add t2, t2, a4
+	jr t2
 3:
 	REG_S a1,        0(t0)
 	REG_S a1,    SZREG(t0)

-- 
2.43.0