linux-kernel - [PATCH v2 1/4] riscv: use lw when reading int cpu in new_vmalloc

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Message-ID: <20250725165410.2896641-4-rkrcmar@ventanamicro.com>
Date: Fri, 25 Jul 2025 18:54:09 +0200
From: Radim Krčmář <rkrcmar@...tanamicro.com>
To: linux-riscv@...ts.infradead.org
Cc: linux-kernel@...r.kernel.org,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>,
	Alexandre Ghiti <alex@...ti.fr>,
	Deepak Gupta <debug@...osinc.com>,
	stable@...r.kernel.org,
	Alexandre Ghiti <alexghiti@...osinc.com>
Subject: [PATCH v2 1/4] riscv: use lw when reading int cpu in new_vmalloc_check

REG_L is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide.
The struct currently has a hole after cpu, so little endian accesses
seemed fine.

Fixes: 503638e0babf ("riscv: Stop emitting preventive sfence.vma for new vmalloc mappings")
Cc: <stable@...r.kernel.org>
Reviewed-by: Alexandre Ghiti <alexghiti@...osinc.com>
Signed-off-by: Radim Krčmář <rkrcmar@...tanamicro.com>
---
v2: split for stable [Alex]
---
 arch/riscv/kernel/entry.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
index 75656afa2d6b..4fdf187a62bf 100644
--- a/arch/riscv/kernel/entry.S
+++ b/arch/riscv/kernel/entry.S
@@ -46,7 +46,7 @@
 	 * a0 = &new_vmalloc[BIT_WORD(cpu)]
 	 * a1 = BIT_MASK(cpu)
 	 */
-	REG_L 	a2, TASK_TI_CPU(tp)
+	lw	a2, TASK_TI_CPU(tp)
 	/*
 	 * Compute the new_vmalloc element position:
 	 * (cpu / 64) * 8 = (cpu >> 6) << 3
-- 
2.50.0