linux-kernel - [PATCH v2 2/4] riscv: use lw when reading int cpu in asm_per

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Message-ID: <20250725165410.2896641-5-rkrcmar@ventanamicro.com>
Date: Fri, 25 Jul 2025 18:54:10 +0200
From: Radim Krčmář <rkrcmar@...tanamicro.com>
To: linux-riscv@...ts.infradead.org
Cc: linux-kernel@...r.kernel.org,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>,
	Alexandre Ghiti <alex@...ti.fr>,
	Deepak Gupta <debug@...osinc.com>,
	stable@...r.kernel.org,
	Alexandre Ghiti <alexghiti@...osinc.com>
Subject: [PATCH v2 2/4] riscv: use lw when reading int cpu in asm_per_cpu

REG_L is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide.
The struct currently has a hole after cpu, so little endian accesses
seemed fine.

Fixes: be97d0db5f44 ("riscv: VMAP_STACK overflow detection thread-safe")
Cc: <stable@...r.kernel.org>
Reviewed-by: Alexandre Ghiti <alexghiti@...osinc.com>
Signed-off-by: Radim Krčmář <rkrcmar@...tanamicro.com>
---
v2: split for stable [Alex]
---
 arch/riscv/include/asm/asm.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/asm.h b/arch/riscv/include/asm/asm.h
index a8a2af6dfe9d..2a16e88e13de 100644
--- a/arch/riscv/include/asm/asm.h
+++ b/arch/riscv/include/asm/asm.h
@@ -91,7 +91,7 @@
 #endif
 
 .macro asm_per_cpu dst sym tmp
-	REG_L \tmp, TASK_TI_CPU_NUM(tp)
+	lw    \tmp, TASK_TI_CPU_NUM(tp)
 	slli  \tmp, \tmp, PER_CPU_OFFSET_SHIFT
 	la    \dst, __per_cpu_offset
 	add   \dst, \dst, \tmp
-- 
2.50.0