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Message-ID: <5b8d42d5-d034-4495-9d28-27478a606d62@kernel.org>
Date: Mon, 28 Jul 2025 07:01:31 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
 Konrad Dybcio <konradybcio@...nel.org>
Cc: Bjorn Andersson <andersson@...nel.org>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd
 <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Marijn Suijten <marijn.suijten@...ainline.org>,
 linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/3] dt-bindings: clock: qcom: Add SM8750 GPU clocks

On 25/07/2025 11:30, Konrad Dybcio wrote:
>>>  
>>> @@ -40,6 +42,9 @@ properties:
>>>        - description: GPLL0 main branch source
>>>        - description: GPLL0 div branch source
>>>  
>>> +  power-domains:
>>> +    maxItems: 1
>>
>> This should be a different binding or you need to restrict other
>> variants here.
> 
> Actually looks like this is the same case as the recent videocc changes
> (15 year old technical debt catching up to us..)
> 
> I'll send a mass-fixup for this.
> 
> Some platforms require 2 and some require 3 entries here. Do I have to
> restrict them very specifically, or can I do:
> 
> power-domains:
>   description:
>     Power domains required for the clock controller to operate
>   minItems: 2
>   items:
>     - description: CX power domain
>     - description: MX power domain
>     - description: MXC power domain
> 
> ?

This is correct and should be in top level, but you still need to
restrict them per each variant (minItems: 3 or maxItems: 2).

> 
> Konrad


Best regards,
Krzysztof

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