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Message-ID: <81a1bd2c-ad4b-4042-9116-c1604e4f0d98@oss.qualcomm.com>
Date: Tue, 29 Jul 2025 16:08:21 +0530
From: Taniya Das <taniya.das@....qualcomm.com>
To: Richa Bharti <Richa.Bharti@...mens.com>, andersson@...nel.org,
        mturquette@...libre.com, sboyd@...nel.org
Cc: linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org, srikanth.krishnakar@...mens.com,
        cedric.hombourger@...mens.com
Subject: Re: [PATCH] clk: qcom: gcc-qcs615: Fix gcc_sdcc2_apps_clk_src



On 7/29/2025 3:19 PM, Richa Bharti wrote:
> On QCS615, we see the same issue as reported on SM8250 and SM6350:
> "gcc_sdcc2_apps_clk_src: rcg didn't update its configuration" during boot.
> This is due to GPLL7 not being enabled by default as a parent clock.
> 
> Setting `.flags = CLK_OPS_PARENT_ENABLE` ensures that the parent (GPLL7)
> gets prepared and enabled when switching to it, fixing the warning.
> 
> Fixes: 39d6dcf67fe9 ("clk: qcom: gcc: Add support for QCS615 GCC clocks")
> Signed-off-by: Richa Bharti <Richa.Bharti@...mens.com>
> ---
> This change is similar to upstream commits:
> - SM8250: 783cb693828c ("clk: qcom: gcc-sm8250: Fix
>   gcc_sdcc2_apps_clk_src")
> - SM6350: df04d166d1f3 ("clk: qcom: gcc-sm6350: Fix
>   gcc_sdcc2_apps_clk_src")
> ---
>  drivers/clk/qcom/gcc-qcs615.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/clk/qcom/gcc-qcs615.c b/drivers/clk/qcom/gcc-qcs615.c
> index 9695446bc2a3..b281f0dfe165 100644
> --- a/drivers/clk/qcom/gcc-qcs615.c
> +++ b/drivers/clk/qcom/gcc-qcs615.c
> @@ -830,6 +830,7 @@ static struct clk_rcg2 gcc_sdcc2_apps_clk_src = {
>  		.name = "gcc_sdcc2_apps_clk_src",
>  		.parent_data = gcc_parent_data_8,
>  		.num_parents = ARRAY_SIZE(gcc_parent_data_8),
> +		.flags = CLK_OPS_PARENT_ENABLE,

This is not the correct way to fix it just because SM8250 and SM6350
uses this ops.

We are testing the right fix internally and will be posting.

>  		.ops = &clk_rcg2_floor_ops,
>  	},
>  };

-- 
Thanks,
Taniya Das


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