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Message-ID: <20250730195022.449894-5-daniel.lezcano@linaro.org>
Date: Wed, 30 Jul 2025 21:50:17 +0200
From: Daniel Lezcano <daniel.lezcano@...aro.org>
To: mbrugger@...e.com,
chester62515@...il.com,
ghennadi.procopciuc@....nxp.com,
shawnguo@...nel.org,
s.hauer@...gutronix.de
Cc: s32@....com,
kernel@...gutronix.de,
festevam@...il.com,
robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
linux-arm-kernel@...ts.infradead.org,
imx@...ts.linux.dev,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Ghennadi Procopciuc <ghennadi.procopciuc@....com>,
Thomas Fossati <thomas.fossati@...aro.org>
Subject: [PATCH 4/8] arm64: dts: s32g399a-rdb3: Enable the STM timers
Enable the timers STM0 -> STM6, STM8 on the s32g399a-rdb3.
The platform has 8 CPUs and the Linux STM timer driver is per
CPU. Enable 8 timers which will be used, other timers are useless for
the Linux kernel and there is no benefit to enable them.
The STM7 is skipped as it is slightly different and needs an extra
property to be handled by the driver.
Signed-off-by: Daniel Lezcano <daniel.lezcano@...aro.org>
Cc: Ghennadi Procopciuc <ghennadi.procopciuc@....com>
Cc: Thomas Fossati <thomas.fossati@...aro.org>
---
.../boot/dts/freescale/s32g399a-rdb3.dts | 32 +++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts b/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts
index 802f543cae4a..467e0c105c3f 100644
--- a/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts
+++ b/arch/arm64/boot/dts/freescale/s32g399a-rdb3.dts
@@ -40,6 +40,38 @@ &uart1 {
status = "okay";
};
+&stm0 {
+ status = "okay";
+};
+
+&stm1 {
+ status = "okay";
+};
+
+&stm2 {
+ status = "okay";
+};
+
+&stm3 {
+ status = "okay";
+};
+
+&stm4 {
+ status = "okay";
+};
+
+&stm5 {
+ status = "okay";
+};
+
+&stm6 {
+ status = "okay";
+};
+
+&stm8 {
+ status = "okay";
+};
+
&i2c4 {
current-sensor@40 {
compatible = "ti,ina231";
--
2.43.0
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