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Message-ID: <20250730195022.449894-7-daniel.lezcano@linaro.org>
Date: Wed, 30 Jul 2025 21:50:19 +0200
From: Daniel Lezcano <daniel.lezcano@...aro.org>
To: mbrugger@...e.com,
chester62515@...il.com,
ghennadi.procopciuc@....nxp.com,
shawnguo@...nel.org,
s.hauer@...gutronix.de
Cc: s32@....com,
kernel@...gutronix.de,
festevam@...il.com,
robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
linux-arm-kernel@...ts.infradead.org,
imx@...ts.linux.dev,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Ghennadi Procopciuc <ghennadi.procopciuc@....com>,
Thomas Fossati <thomas.fossati@...aro.org>
Subject: [PATCH 6/8] arm64: dts: s32g274-rd2: Enable the SWT watchdog
The SWT0 is directly connected to the reset line and only one instance
is useful for its purpose. Let's enable it for the s32g274-rd2.
Signed-off-by: Daniel Lezcano <daniel.lezcano@...aro.org>
Cc: Ghennadi Procopciuc <ghennadi.procopciuc@....com>
Cc: Thomas Fossati <thomas.fossati@...aro.org>
---
arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
index 505776d19151..4f58be68c818 100644
--- a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
+++ b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
@@ -56,6 +56,10 @@ &stm3 {
status = "okay";
};
+&swt0 {
+ status = "okay";
+};
+
&usdhc0 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc0>;
--
2.43.0
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