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Message-Id: <20250730-drm-tidss-field-api-v1-11-a71ae8dd2782@kernel.org>
Date: Wed, 30 Jul 2025 10:57:11 +0200
From: Maxime Ripard <mripard@...nel.org>
To: Jyri Sarha <jyri.sarha@....fi>,
Tomi Valkeinen <tomi.valkeinen@...asonboard.com>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Thomas Zimmermann <tzimmermann@...e.de>, David Airlie <airlied@...il.com>,
Simona Vetter <simona@...ll.ch>
Cc: dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
Maxime Ripard <mripard@...nel.org>
Subject: [PATCH 11/14] drm/tidss: dispc: Switch VP_REG_GET to using a mask
The VP_REG_GET function takes the start and end bits as parameter and
will generate a mask out of them.
This makes it difficult to share the masks between callers, since we now
need two arguments and to keep them consistent.
Let's change VP_REG_GET to take the mask as an argument instead, and let
the caller create the mask. Eventually, this mask will be moved to a
define.
Signed-off-by: Maxime Ripard <mripard@...nel.org>
---
drivers/gpu/drm/tidss/tidss_dispc.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c
index c22036d2b1dc2115245014d2e0572ac6bffa77ef..743ceca721691b3944d36bdd5e5fb929d19ab82c 100644
--- a/drivers/gpu/drm/tidss/tidss_dispc.c
+++ b/drivers/gpu/drm/tidss/tidss_dispc.c
@@ -636,14 +636,13 @@ static void VID_REG_FLD_MOD(struct dispc_device *dispc, u32 hw_plane, u32 idx,
{
dispc_vid_write(dispc, hw_plane, idx,
FLD_MOD(dispc_vid_read(dispc, hw_plane, idx), val, mask));
}
-static u32 VP_REG_GET(struct dispc_device *dispc, u32 vp, u32 idx,
- u32 start, u32 end)
+static u32 VP_REG_GET(struct dispc_device *dispc, u32 vp, u32 idx, u32 mask)
{
- return FIELD_GET(GENMASK(start, end), dispc_vp_read(dispc, vp, idx));
+ return FIELD_GET(mask, dispc_vp_read(dispc, vp, idx));
}
static void VP_REG_FLD_MOD(struct dispc_device *dispc, u32 vp, u32 idx, u32 val,
u32 start, u32 end)
{
@@ -1274,16 +1273,17 @@ void dispc_vp_unprepare(struct dispc_device *dispc, u32 hw_videoport)
}
}
bool dispc_vp_go_busy(struct dispc_device *dispc, u32 hw_videoport)
{
- return VP_REG_GET(dispc, hw_videoport, DISPC_VP_CONTROL, 5, 5);
+ return VP_REG_GET(dispc, hw_videoport, DISPC_VP_CONTROL,
+ GENMASK(5, 5));
}
void dispc_vp_go(struct dispc_device *dispc, u32 hw_videoport)
{
- WARN_ON(VP_REG_GET(dispc, hw_videoport, DISPC_VP_CONTROL, 5, 5));
+ WARN_ON(VP_REG_GET(dispc, hw_videoport, DISPC_VP_CONTROL, GENMASK(5, 5)));
VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, 1, 5, 5);
}
enum c8_to_c12_mode { C8_TO_C12_REPLICATE, C8_TO_C12_MAX, C8_TO_C12_MIN };
--
2.50.1
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