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Message-ID: <3d13d5ad-f121-4920-8d06-feea0f0670a7@intel.com>
Date: Wed, 30 Jul 2025 18:53:53 +0300
From: Adrian Hunter <adrian.hunter@...el.com>
To: Victor Shih <victorshihgli@...il.com>, <ulf.hansson@...aro.org>
CC: <linux-mmc@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<benchuanggli@...il.com>, <ben.chuang@...esyslogic.com.tw>,
	<HL.Liu@...esyslogic.com.tw>, Victor Shih <victor.shih@...esyslogic.com.tw>,
	<stable@...r.kernel.org>
Subject: Re: [PATCH V3 1/3] mmc: sdhci-pci-gli: Add a new function to simplify
 the code

On 29/07/2025 09:58, Victor Shih wrote:
> From: Victor Shih <victor.shih@...esyslogic.com.tw>
> 
> In preparation to fix replay timer timeout, add
> sdhci_gli_mask_replay_timer_timeout() function
> to simplify some of the code, allowing it to be re-used.
> 
> Signed-off-by: Victor Shih <victor.shih@...esyslogic.com.tw>
> Fixes: 1ae1d2d6e555 ("mmc: sdhci-pci-gli: Add Genesys Logic GL9763E support")
> Cc: stable@...r.kernel.org

Acked-by: Adrian Hunter <adrian.hunter@...el.com>

> ---
>  drivers/mmc/host/sdhci-pci-gli.c | 30 ++++++++++++++++--------------
>  1 file changed, 16 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
> index 4c2ae71770f7..f678c91f8d3e 100644
> --- a/drivers/mmc/host/sdhci-pci-gli.c
> +++ b/drivers/mmc/host/sdhci-pci-gli.c
> @@ -287,6 +287,20 @@
>  #define GLI_MAX_TUNING_LOOP 40
>  
>  /* Genesys Logic chipset */
> +static void sdhci_gli_mask_replay_timer_timeout(struct pci_dev *pdev)
> +{
> +	int aer;
> +	u32 value;
> +
> +	/* mask the replay timer timeout of AER */
> +	aer = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
> +	if (aer) {
> +		pci_read_config_dword(pdev, aer + PCI_ERR_COR_MASK, &value);
> +		value |= PCI_ERR_COR_REP_TIMER;
> +		pci_write_config_dword(pdev, aer + PCI_ERR_COR_MASK, value);
> +	}
> +}
> +
>  static inline void gl9750_wt_on(struct sdhci_host *host)
>  {
>  	u32 wt_value;
> @@ -607,7 +621,6 @@ static void gl9750_hw_setting(struct sdhci_host *host)
>  {
>  	struct sdhci_pci_slot *slot = sdhci_priv(host);
>  	struct pci_dev *pdev;
> -	int aer;
>  	u32 value;
>  
>  	pdev = slot->chip->pdev;
> @@ -626,12 +639,7 @@ static void gl9750_hw_setting(struct sdhci_host *host)
>  	pci_set_power_state(pdev, PCI_D0);
>  
>  	/* mask the replay timer timeout of AER */
> -	aer = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
> -	if (aer) {
> -		pci_read_config_dword(pdev, aer + PCI_ERR_COR_MASK, &value);
> -		value |= PCI_ERR_COR_REP_TIMER;
> -		pci_write_config_dword(pdev, aer + PCI_ERR_COR_MASK, value);
> -	}
> +	sdhci_gli_mask_replay_timer_timeout(pdev);
>  
>  	gl9750_wt_off(host);
>  }
> @@ -806,7 +814,6 @@ static void sdhci_gl9755_set_clock(struct sdhci_host *host, unsigned int clock)
>  static void gl9755_hw_setting(struct sdhci_pci_slot *slot)
>  {
>  	struct pci_dev *pdev = slot->chip->pdev;
> -	int aer;
>  	u32 value;
>  
>  	gl9755_wt_on(pdev);
> @@ -841,12 +848,7 @@ static void gl9755_hw_setting(struct sdhci_pci_slot *slot)
>  	pci_set_power_state(pdev, PCI_D0);
>  
>  	/* mask the replay timer timeout of AER */
> -	aer = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
> -	if (aer) {
> -		pci_read_config_dword(pdev, aer + PCI_ERR_COR_MASK, &value);
> -		value |= PCI_ERR_COR_REP_TIMER;
> -		pci_write_config_dword(pdev, aer + PCI_ERR_COR_MASK, value);
> -	}
> +	sdhci_gli_mask_replay_timer_timeout(pdev);
>  
>  	gl9755_wt_off(pdev);
>  }


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